drivers: spi_bitbang: Fix timing in SPI bitbang driver

Fix timing in SPI bitbang driver.
The issue occurs with CPHA=1 when the input data is changed immediately
after the clock shift on the last bit of the read.
Because we read the input bit after changing the clock, this bit
becomes invalid.
Instead of doing wait, clock-change, read. Do wait, read, clock-change.

Signed-off-by: Joakim Andersson <joerchan@gmail.com>