intel_adsp: power: clock gating in idle

This patch enables DSP clock gating for ACE platforms. By default, clock
gating is blocked by the firmware in the hardware configuration. If
CONFIG_ADSP_IDLE_CLOCK_GATING is enabled, this prevent is not active and
clock can be gated when core is in idle state. WIth this option disabled
clock gating will only be enabled in hardware during power gating.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>