drivers: spi_sifive: Optimize xfer to minimize downtime between frames.

The SPI peripheral on SiFive parts uses FIFOs for Rx and Tx (FIFO size
undocumented, but empirically found to be 8 bytes on FE310, likely
identical on FU540 / FU740). Make use of these FIFOs in order to
continuiously feed Tx data as available.

Verified to transmit 1 MHz SPI @ 200 MHz coreclk / tlclk on FE310
continuously without downtime between frames.

Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>