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Commit 30120832 authored by Ilya Tagunov's avatar Ilya Tagunov Committed by Anas Nashif
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drivers: clock_control: stm32f0/f3: streamline PREDIV handling 



We should not set PLLSRC bits here. It is done by
LL_PLL_ConfigSystemClock_* functions which are called later.
Also, PREDIV1 setting should not be restricted to HSE only.

Signed-off-by: default avatarIlya Tagunov <tagunil@gmail.com>
parent 907c5458
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