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Commit 2de3133a authored by TOKITA Hiroshi's avatar TOKITA Hiroshi Committed by Carles Cufí
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riscv: Add an option for configuring mcause exception mask 



GD32V processor core is used non-standard bitmask
for mcause register. Add option to configure the bitmask
to support GD32V.

Signed-off-by: default avatarTOKITA Hiroshi <tokita.hiroshi@gmail.com>
parent d79d4f0b
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