arch: arm: cortex_a_r: add Kconfig options for cache segregation

On Arm Cortex R52, cache segregation policy controls the
number of L1 I/D cache ways that are allocated to Flash
and AXIM interface. Adding Kconfig options for configuring
it.

Writing to IMP_CSCTRL is only permitted before the caches
have been enabled, following a system reset.

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>