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Commit 25025675 authored by Guennadi Liakhovetski's avatar Guennadi Liakhovetski Committed by Daniel DeGrasse
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SoC: Intel: ADSP: enable instruction cache 



All intel_adsp architectures have instruction cache. Selecting
CPU_HAS_ICACHE fixes gdb memory writing problems.

Signed-off-by: default avatarGuennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
parent a8a4a5a6
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