Commit 244049bd authored by Daniel Leung's avatar Daniel Leung Committed by Anas Nashif
Browse files

x86: type cast to uint8_t* for bit ops 



This changes the type casting of the incoming addresses to
the bit ops from uint32_t* to uint8_t*. This avoids compilers
and static analyzers complaining about the incoming out of
bound access if incoming argument is an array smaller than
4 bytes.

Signed-off-by: default avatarDaniel Leung <daniel.leung@intel.com>
parent 5dae0c1b

include/arch/x86/arch.h

+5 −5
Original line number Diff line number Diff line
@@ -154,7 +154,7 @@ static ALWAYS_INLINE uint32_t sys_read32(mm_reg_t addr) 
static ALWAYS_INLINE void sys_set_bit(mem_addr_t addr, unsigned int bit)

{

	__asm__ volatile("btsl %1, %0"

			 : "+m" (*(volatile uint32_t *) (addr))

			 : "+m" (*(volatile uint8_t *) (addr))

			 : "Ir" (bit)

			 : "memory");

}
@@ -162,7 +162,7 @@ static ALWAYS_INLINE void sys_set_bit(mem_addr_t addr, unsigned int bit) 
static ALWAYS_INLINE void sys_clear_bit(mem_addr_t addr, unsigned int bit)

{

	__asm__ volatile("btrl %1, %0"

			 : "+m" (*(volatile uint32_t *) (addr))

			 : "+m" (*(volatile uint8_t *) (addr))

			 : "Ir" (bit));

}
@@ -172,7 +172,7 @@ static ALWAYS_INLINE int sys_test_bit(mem_addr_t addr, unsigned int bit) 


	__asm__ volatile("btl %2, %1;"

			 "sbb %0, %0"

			 : "=r" (ret), "+m" (*(volatile uint32_t *) (addr))

			 : "=r" (ret), "+m" (*(volatile uint8_t *) (addr))

			 : "Ir" (bit));



	return ret;
@@ -185,7 +185,7 @@ static ALWAYS_INLINE int sys_test_and_set_bit(mem_addr_t addr, 


	__asm__ volatile("btsl %2, %1;"

			 "sbb %0, %0"

			 : "=r" (ret), "+m" (*(volatile uint32_t *) (addr))

			 : "=r" (ret), "+m" (*(volatile uint8_t *) (addr))

			 : "Ir" (bit));



	return ret;
@@ -198,7 +198,7 @@ static ALWAYS_INLINE int sys_test_and_clear_bit(mem_addr_t addr, 


	__asm__ volatile("btrl %2, %1;"

			 "sbb %0, %0"

			 : "=r" (ret), "+m" (*(volatile uint32_t *) (addr))

			 : "=r" (ret), "+m" (*(volatile uint8_t *) (addr))

			 : "Ir" (bit));



	return ret;

CRA Git | Maintained and supported by SUSTech CRA and CCSE