drivers: ethernet: enc28j60: ESTAT TXABRT bit should be cleared on error

If the TXABRT bit from ESTAT is ever set (because of a single failed
transmission), the driver will continue showing an error on every
subsequent packet sent, although it is correctly sent:

	 <err> eth_enc28j60: TX failed!

The enc28j60 datasheet says under
"12.1.3 TRANSMIT ERROR INTERRUPT FLAG (TXERIF)":

	"After determining the problem and solution, the
	host controller should clear the LATECOL (if set) and
	TXABRT bits so that future aborts can be detected
	accurately."

Therefore, clear the TXABRT and LATECOL bits in case of transmission error.

Signed-off-by: Xavier Ruppen <xruppen@gmail.com>