Skip to content
Commit 20165f57 authored by Carlo Caione's avatar Carlo Caione Committed by Anas Nashif
Browse files

barriers: arm64: Implement arch-specific barrier op 



For barrier_isync_fence_full() use the assembly code to generate a
proper ISB instruction.

Signed-off-by: default avatarCarlo Caione <ccaione@baylibre.com>
parent fb8fde8f
Show whitespace changes
Inline Side-by-side
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment

CRA Git | Maintained and supported by SUSTech CRA and CCSE