Skip to content
Commit 1f483b37 authored by Laurentiu Mihalcea's avatar Laurentiu Mihalcea Committed by Benjamin Cabé
Browse files

drivers: clock_control: mcux_ccm: support QM/QXP's ESAI/AUD_PLL1 clocks 



Add support for gating/ungating IMX8QM/IMX8QXP's ESAI clocks and the
AUD_PLL_DIV_CLK0 clock used as source for ESAI's EXTAL.

Signed-off-by: default avatarLaurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
parent 34d888cb
Show whitespace changes
Inline Side-by-side
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment

CRA Git | Maintained and supported by SUSTech CRA and CCSE