Commit 1af5ce40 authored by Yannis Damigos's avatar Yannis Damigos Committed by Kumar Gala
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dts/arm/st: Fix SPI1 clock property on F0 series 



SPI1 is on APB2 on F0 series.

Signed-off-by: default avatarYannis Damigos <giannis.damigos@gmail.com>
parent ebc5e51e

dts/arm/st/stm32f0.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -157,7 +157,7 @@ 
			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x40013000 0x400>;

			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00001000>;

			clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>;

			interrupts = <25 3>;

			status = "disabled";

			label = "SPI_1";

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