soc: intel_adsp_cavs25: Fix linker section overlap, support !COHERENCE

The alignment on .bss was coming out wrong.  The ". = ALIGN(4096);"
statement was being ignored, somewhat inexplicably.  This resulted in
the bss symbols being assigned corret-seeming, non-overlapping
addresses.  But it overlapped the page-sized padding at the end of
.data.

As it turns out, the rimage format (not the linker or Zephyr) requires
page-sized sections to copy, and the bootloader code does that copy by
writing to the CACHED mapping of the memory (.bss is, like .data,
uncached/coherent by default).  So at runtime the CPU was running in a
context where the cache was populated with "booby trap" data at the
start of .bss.  True .bss access would hit the memory uncached and see
the "correct" value, but at arbitrary times during execution lines
would be flushed out of L1 cache on top of it.

Oops.  This was found by accident, actually, as routine changes to the
linker script to correctly support the case where KERNEL_COHERENCE=n
(i.e. put everything in the cached mapping and nothing in uncached)
suddenly hit rimage failures because of the overlap.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>