Commit 193eeaef authored by Mert Ekren's avatar Mert Ekren Committed by Mahesh Mahadevan
Browse files

drivers: pinctrl: max32: fix correct configuring drive strength 



This commit fixes configuring pin drive strength in pinctrl driver.
Previously, there was a mismatch while filling pincfg and checking
pincfg drive strength field. This fix simplifies the operation and
avoids gpio driver header dependency.

Signed-off-by: default avatarMert Ekren <mert.ekren@analog.com>
Co-Authored-By: default avatarSadik Ozer <sadik.ozer@analog.com>
parent 9dc0af55

drivers/pinctrl/pinctrl_max32.c

+1 −15
Original line number Diff line number Diff line
@@ -5,7 +5,6 @@ 
 */



#include <zephyr/dt-bindings/pinctrl/max32-pinctrl.h>

#include <zephyr/dt-bindings/gpio/adi-max32-gpio.h>

#include <zephyr/drivers/pinctrl.h>



#include <gpio.h>
@@ -67,20 +66,7 @@ static int pinctrl_configure_pin(pinctrl_soc_pin_t soc_pin) 
		gpio_cfg.vssel = MXC_GPIO_VSSEL_VDDIO;

	}



	switch (pincfg & MAX32_GPIO_DRV_STRENGTH_MASK) {

	case MAX32_GPIO_DRV_STRENGTH_1:

		gpio_cfg.drvstr = MXC_GPIO_DRVSTR_1;

		break;

	case MAX32_GPIO_DRV_STRENGTH_2:

		gpio_cfg.drvstr = MXC_GPIO_DRVSTR_2;

		break;

	case MAX32_GPIO_DRV_STRENGTH_3:

		gpio_cfg.drvstr = MXC_GPIO_DRVSTR_3;

		break;

	default:

		gpio_cfg.drvstr = MXC_GPIO_DRVSTR_0;

		break;

	}

	gpio_cfg.drvstr = (pincfg >> MAX32_DRV_STRENGTH_SHIFT) & MAX32_DRV_STRENGTH_MASK;



	if (MXC_GPIO_Config(&gpio_cfg) != 0) {

		return -ENOTSUP;

include/zephyr/dt-bindings/pinctrl/max32-pinctrl.h

+1 −0
Original line number Diff line number Diff line
@@ -63,5 +63,6 @@ 
#define MAX32_POWER_SOURCE_SHIFT   0x04

#define MAX32_OUTPUT_HIGH_SHIFT    0x05

#define MAX32_DRV_STRENGTH_SHIFT   0x06 /* 2 bits */

#define MAX32_DRV_STRENGTH_MASK    0x03



#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_MAX32_PINCTRL_H_ */

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