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Commit 164f2cdf authored by Jose Alberto Meza's avatar Jose Alberto Meza Committed by Anas Nashif
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dts: arm: mchp: Add missing eSPI interrupt 



eSPI controller can generate another IRQ for extended/custom
virtual wires.

Signed-off-by: default avatarJose Alberto Meza <jose.a.meza.arellano@intel.com>
parent efccfcbf
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