dts: riscv: add all contexts and devices to the plic on mpfs

Microchip's PolarFire SoC has a total of 9 contexts associated with the
Platform Interrupt controller (PLIC). the E51 core has a single context
(M Mode), and the application processor U54 cores have two each (M mode
and S mode, respectively)

While we are at it, there are a total of 186 interrupts, not 187.

Signed-off-by: Conor Paxton <conor.paxton@microchip.com>