subsys: fs/nvs: do not assume the flash is mapped at address 0

The two functions that compute the crc16 when writing (nvs_append_close)
and when reading (nvs_check_crc) currently assume that the flash is
also mapped in read mode at address 0. This is not true on all SoCs, and
even less on an SPI flash.

Fix this by adding a new nvs_compute_crc() function which compute the
CRC16 of an entry using the flash using nvs_flash_read, in blocks of
write_block_size. This might not be the optimal size, but it keeps the
stack usage small.

Use this function in both nvs_append_close() and nvs_check_crc() instead
of accessing the flash from address 0.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>