soc: stm32: unify cache conditionals for F7 and H7 targets

The instruction cache in the STM32F7 and H7 was enabled regardless
of the value assigned via Kconfig to the CONFIG_ICACHE parameter.
This commit adds the missing conditional checks; note that this does
not affect the compiled behavior unless CONFIG_ICACHE is explicitly
disabled by the user.

Remove a redundant low-level check on DCache being already enabled,
since it is also performed inside the SCB_EnableDCache function.

Signed-off-by: Luca Burelli <l.burelli@arduino.cc>