Commit 0ebe14be authored by Gerard Marull-Paretas's avatar Gerard Marull-Paretas Committed by Carles Cufi
Browse files

sys: util: migrate all files to DIV_ROUND_UP 



ceiling_fraction is deprecated, use DIV_ROUND_UP.

Signed-off-by: default avatarGerard Marull-Paretas <gerard.marull@nordicsemi.no>
parent 53da110d

drivers/adc/adc_npcx.c

+1 −1
Original line number Diff line number Diff line
@@ -799,7 +799,7 @@ static int adc_npcx_init(const struct device *dev) 
	}



	/* Configure the ADC clock */

	prescaler = ceiling_fraction(data->input_clk, NPCX_ADC_CLK);

	prescaler = DIV_ROUND_UP(data->input_clk, NPCX_ADC_CLK);

	if (prescaler > 0x40) {

		prescaler = 0x40;

	}

drivers/flash/nrf_qspi_nor.c

+5 −5
Original line number Diff line number Diff line
@@ -114,7 +114,7 @@ BUILD_ASSERT(INST_0_SCK_FREQUENCY >= (NRF_QSPI_BASE_CLOCK_FREQ / 16), 
#else

/* For requested SCK < 32 MHz, use divider /2 for HFCLK192M. */

#define BASE_CLOCK_DIV NRF_CLOCK_HFCLK_DIV_2

#define INST_0_SCK_CFG (ceiling_fraction(NRF_QSPI_BASE_CLOCK_FREQ / 2, \

#define INST_0_SCK_CFG (DIV_ROUND_UP(NRF_QSPI_BASE_CLOCK_FREQ / 2, \

				     INST_0_SCK_FREQUENCY) - 1)

#endif
@@ -126,7 +126,7 @@ BUILD_ASSERT(INST_0_SCK_FREQUENCY >= (NRF_QSPI_BASE_CLOCK_FREQ / 16), 
#if (INST_0_SCK_FREQUENCY >= NRF_QSPI_BASE_CLOCK_FREQ)

#define INST_0_SCK_CFG NRF_QSPI_FREQ_DIV1

#else

#define INST_0_SCK_CFG (ceiling_fraction(NRF_QSPI_BASE_CLOCK_FREQ, \

#define INST_0_SCK_CFG (DIV_ROUND_UP(NRF_QSPI_BASE_CLOCK_FREQ, \

					 INST_0_SCK_FREQUENCY) - 1)



#endif
@@ -1295,7 +1295,7 @@ static int enter_dpd(const struct device *const dev) 


		if (t_enter_dpd) {

			uint32_t t_enter_dpd_us =

				ceiling_fraction(t_enter_dpd, NSEC_PER_USEC);

				DIV_ROUND_UP(t_enter_dpd, NSEC_PER_USEC);



			k_busy_wait(t_enter_dpd_us);

		}
@@ -1321,7 +1321,7 @@ static int exit_dpd(const struct device *const dev) 


		if (t_exit_dpd) {

			uint32_t t_exit_dpd_us =

				ceiling_fraction(t_exit_dpd, NSEC_PER_USEC);

				DIV_ROUND_UP(t_exit_dpd, NSEC_PER_USEC);



			k_busy_wait(t_exit_dpd_us);

		}

drivers/flash/spi_flash_at45.c

+2 −2
Original line number Diff line number Diff line
@@ -685,10 +685,10 @@ static const struct flash_driver_api spi_flash_at45_api = { 
		.sector_size = DT_INST_PROP(idx, sector_size),		     \

		.block_size  = DT_INST_PROP(idx, block_size),		     \

		.page_size   = DT_INST_PROP(idx, page_size),		     \

		.t_enter_dpd = ceiling_fraction(			     \

		.t_enter_dpd = DIV_ROUND_UP(			     \

					DT_INST_PROP(idx, enter_dpd_delay),  \

					NSEC_PER_USEC),			     \

		.t_exit_dpd  = ceiling_fraction(			     \

		.t_exit_dpd  = DIV_ROUND_UP(			     \

					DT_INST_PROP(idx, exit_dpd_delay),   \

					NSEC_PER_USEC),			     \

		.use_udpd    = DT_INST_PROP(idx, use_udpd),		     \

drivers/flash/spi_nor.c

+5 −5
Original line number Diff line number Diff line
@@ -46,17 +46,17 @@ LOG_MODULE_REGISTER(spi_nor, CONFIG_FLASH_LOG_LEVEL); 
#define SPI_NOR_MAX_ADDR_WIDTH 4



#if DT_INST_NODE_HAS_PROP(0, t_enter_dpd)

#define T_DP_MS ceiling_fraction(DT_INST_PROP(0, t_enter_dpd), NSEC_PER_MSEC)

#define T_DP_MS DIV_ROUND_UP(DT_INST_PROP(0, t_enter_dpd), NSEC_PER_MSEC)

#else /* T_ENTER_DPD */

#define T_DP_MS 0

#endif /* T_ENTER_DPD */

#if DT_INST_NODE_HAS_PROP(0, t_exit_dpd)

#define T_RES1_MS ceiling_fraction(DT_INST_PROP(0, t_exit_dpd), NSEC_PER_MSEC)

#define T_RES1_MS DIV_ROUND_UP(DT_INST_PROP(0, t_exit_dpd), NSEC_PER_MSEC)

#endif /* T_EXIT_DPD */

#if DT_INST_NODE_HAS_PROP(0, dpd_wakeup_sequence)

#define T_DPDD_MS ceiling_fraction(DT_INST_PROP_BY_IDX(0, dpd_wakeup_sequence, 0), NSEC_PER_MSEC)

#define T_CRDP_MS ceiling_fraction(DT_INST_PROP_BY_IDX(0, dpd_wakeup_sequence, 1), NSEC_PER_MSEC)

#define T_RDP_MS ceiling_fraction(DT_INST_PROP_BY_IDX(0, dpd_wakeup_sequence, 2), NSEC_PER_MSEC)

#define T_DPDD_MS DIV_ROUND_UP(DT_INST_PROP_BY_IDX(0, dpd_wakeup_sequence, 0), NSEC_PER_MSEC)

#define T_CRDP_MS DIV_ROUND_UP(DT_INST_PROP_BY_IDX(0, dpd_wakeup_sequence, 1), NSEC_PER_MSEC)

#define T_RDP_MS DIV_ROUND_UP(DT_INST_PROP_BY_IDX(0, dpd_wakeup_sequence, 2), NSEC_PER_MSEC)

#else /* DPD_WAKEUP_SEQUENCE */

#define T_DPDD_MS 0

#endif /* DPD_WAKEUP_SEQUENCE */

drivers/fpga/fpga_ice40.c

+2 −2
Original line number Diff line number Diff line
@@ -381,7 +381,7 @@ static int fpga_ice40_load_spi(const struct device *dev, uint32_t *image_ptr, ui 


	LOG_DBG("Send %u clocks", config->leading_clocks);

	tx_buf.buf = clock_buf;

	tx_buf.len = ceiling_fraction(config->leading_clocks, BITS_PER_BYTE);

	tx_buf.len = DIV_ROUND_UP(config->leading_clocks, BITS_PER_BYTE);

	ret = spi_write_dt(&config->bus, &tx_bufs);

	if (ret < 0) {

		LOG_ERR("Failed to send leading %u clocks: %d", config->leading_clocks, ret);
@@ -413,7 +413,7 @@ static int fpga_ice40_load_spi(const struct device *dev, uint32_t *image_ptr, ui 


	LOG_DBG("Send %u clocks", config->trailing_clocks);

	tx_buf.buf = clock_buf;

	tx_buf.len = ceiling_fraction(config->trailing_clocks, BITS_PER_BYTE);

	tx_buf.len = DIV_ROUND_UP(config->trailing_clocks, BITS_PER_BYTE);

	ret = spi_write_dt(&config->bus, &tx_bufs);

	if (ret < 0) {

		LOG_ERR("Failed to send trailing %u clocks: %d", config->trailing_clocks, ret);

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