Skip to content
Commit 0c053190 authored by Carlo Caione's avatar Carlo Caione Committed by Stephanos Ioannidis
Browse files

riscv: Introduce qemu_riscv32e board. 



To support and test RV32E.

Signed-off-by: default avatarCarlo Caione <ccaione@baylibre.com>
parent 673f41e7
Show whitespace changes
Inline Side-by-side
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment

CRA Git | Maintained and supported by SUSTech CRA and CCSE