Commit 0b20e2af authored by Marcin Szymczyk's avatar Marcin Szymczyk Committed by Anas Nashif
Browse files

arch: riscv: skip `isr.S` when SW ISR table is not generated 



`isr.S` depends on `CONFIG_GEN_SW_ISR_TABLE`.
Do not build it if SW ISR table is not present.

Signed-off-by: default avatarMarcin Szymczyk <marcin.szymczyk@nordicsemi.no>
parent 79024574

arch/riscv/core/CMakeLists.txt

+1 −1
Original line number Diff line number Diff line
@@ -6,7 +6,6 @@ zephyr_library_sources( 
  cpu_idle.c

  fatal.c

  irq_manage.c

  isr.S

  prep_c.c

  reboot.c

  reset.S
@@ -21,6 +20,7 @@ endif () 
zephyr_library_sources_ifdef(CONFIG_FPU_SHARING fpu.c fpu.S)

zephyr_library_sources_ifdef(CONFIG_DEBUG_COREDUMP coredump.c)

zephyr_library_sources_ifdef(CONFIG_IRQ_OFFLOAD irq_offload.c)

zephyr_library_sources_ifdef(CONFIG_GEN_SW_ISR_TABLE isr.S)

zephyr_library_sources_ifdef(CONFIG_RISCV_PMP pmp.c pmp.S)

zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE tls.c)

zephyr_library_sources_ifdef(CONFIG_USERSPACE userspace.S)

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