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Commit 0a5b2591 authored by Alexandre Mergnat's avatar Alexandre Mergnat Committed by Anas Nashif
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tests: protection: add riscv support



Execute tests are disabled for RISC-V because is isn't able
to set an execution restriction. From RISC-V documentation:
  "Instruction address-translation and protection are unaffected
  by the setting of MPRV"
MPRV is used to apply memory protection restriction when CPU is
running in machine mode (kernel).

Signed-off-by: default avatarAlexandre Mergnat <amergnat@baylibre.com>
parent 39208c27
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