soc: arc: Increase cpu frequency for nsim_hs_smp

0.5 Mhz with 100 ticks per sec leaves 5000 cycles per tick,
which broke some tests that assumed more work within 1 tick.
Set to 1 Mhz: balance multi-core simulation speed and tick duration.

Fixes #27943

Signed-off-by: Ruud Derwig <Ruud.Derwig@synopsys.com>