Commit cb7f6cbf authored by F. Ramu's avatar F. Ramu Committed by Erwan Gouriou
Browse files

stm32cube: update stm32f7 to cube version V1.17.4 

Update Cube version for STM32F7xx series
on https://github.com/STMicroelectronics


from version v1.17.2
to version v1.17.4

Signed-off-by: default avatarF. Ramu <francois.ramu@st.com>
parent b897f54f

stm32cube/stm32f7xx/README

+2 −9
Original line number Diff line number Diff line
@@ -6,7 +6,7 @@ Origin: 
   http://www.st.com/en/embedded-software/stm32cubef7.html



Status:

   version v1.17.2

   version v1.17.4



Purpose:

   ST Microelectronics official MCU package for STM32F7 series.
@@ -23,7 +23,7 @@ URL: 
   https://github.com/STMicroelectronics/STM32CubeF7



Commit:

   767d083e202412da7f50f11515bf3fa1be2cf4fe

   e5939c26775f313f376b68c80c2a212a795a2993



Maintained-by:

   External
@@ -59,11 +59,4 @@ Patch List: 
    Impacted files:

     drivers/include/Legacy/stm32_hal_legacy.h



   *Fix: Use the correct register DESC0

    This fix ensures that the TX timestamp is properly set by correctly

    checking the ETH_DMATXDESC_LS and ETH_DMATXDESC_TTSS flags in the DESC0 register.

    Impacted files:

     stm32cube/stm32f7xx/drivers/src/stm32f7xx_hal_eth.c

    ST Internal reference: 185461



   See release_note.html from STM32Cube

stm32cube/stm32f7xx/drivers/include/Legacy/stm32_hal_legacy.h

+84 −15
Original line number Diff line number Diff line
@@ -472,7 +472,9 @@ extern "C" { 
#define TYPEPROGRAMDATA_FASTBYTE      FLASH_TYPEPROGRAMDATA_FASTBYTE

#define TYPEPROGRAMDATA_FASTHALFWORD  FLASH_TYPEPROGRAMDATA_FASTHALFWORD

#define TYPEPROGRAMDATA_FASTWORD      FLASH_TYPEPROGRAMDATA_FASTWORD

#if !defined(STM32F2) && !defined(STM32F4) && !defined(STM32F7) && !defined(STM32H7) && !defined(STM32H5)

/* #define PAGESIZE                      FLASH_PAGE_SIZE */

#endif /* STM32F2 && STM32F4 && STM32F7 &&  STM32H7 && STM32H5 */

#define TYPEPROGRAM_FASTBYTE          FLASH_TYPEPROGRAM_BYTE

#define TYPEPROGRAM_FASTHALFWORD      FLASH_TYPEPROGRAM_HALFWORD

#define TYPEPROGRAM_FASTWORD          FLASH_TYPEPROGRAM_WORD
@@ -536,6 +538,10 @@ extern "C" { 
#define FLASH_FLAG_WDW                FLASH_FLAG_WBNE

#define OB_WRP_SECTOR_All             OB_WRP_SECTOR_ALL

#endif /* STM32H7 */

#if defined(STM32H7RS)

#define FLASH_OPTKEY1                 FLASH_OPT_KEY1

#define FLASH_OPTKEY2                 FLASH_OPT_KEY2

#endif /* STM32H7RS */

#if defined(STM32U5)

#define OB_USER_nRST_STOP             OB_USER_NRST_STOP

#define OB_USER_nRST_STDBY            OB_USER_NRST_STDBY
@@ -601,6 +607,15 @@ extern "C" { 
#define HAL_SYSCFG_DisableIOAnalogSwitchVDD       HAL_SYSCFG_DisableIOSwitchVDD

#endif /* STM32G4 */



#if defined(STM32U5)



#define HAL_SYSCFG_EnableIOAnalogSwitchBooster                 HAL_SYSCFG_EnableIOAnalogBooster

#define HAL_SYSCFG_DisableIOAnalogSwitchBooster                HAL_SYSCFG_DisableIOAnalogBooster

#define HAL_SYSCFG_EnableIOAnalogSwitchVoltageSelection        HAL_SYSCFG_EnableIOAnalogVoltageSelection

#define HAL_SYSCFG_DisableIOAnalogSwitchVoltageSelection       HAL_SYSCFG_DisableIOAnalogVoltageSelection



#endif /* STM32U5 */



#if defined(STM32H5)

#define SYSCFG_IT_FPU_IOC         SBS_IT_FPU_IOC

#define SYSCFG_IT_FPU_DZC         SBS_IT_FPU_DZC
@@ -806,6 +821,21 @@ extern "C" { 
#define GPIO_AF0_S2DSTOP                          GPIO_AF0_SRDSTOP

#define GPIO_AF11_LPGPIO                          GPIO_AF11_LPGPIO1

#endif /* STM32U5 */



#if defined(STM32WBA)

#define GPIO_AF11_RF_ANTSW0    GPIO_AF11_RF

#define GPIO_AF11_RF_ANTSW1    GPIO_AF11_RF

#define GPIO_AF11_RF_ANTSW2    GPIO_AF11_RF

#define GPIO_AF11_RF_IO1       GPIO_AF11_RF

#define GPIO_AF11_RF_IO2       GPIO_AF11_RF

#define GPIO_AF11_RF_IO3       GPIO_AF11_RF

#define GPIO_AF11_RF_IO4       GPIO_AF11_RF

#define GPIO_AF11_RF_IO5       GPIO_AF11_RF

#define GPIO_AF11_RF_IO6       GPIO_AF11_RF

#define GPIO_AF11_RF_IO7       GPIO_AF11_RF

#define GPIO_AF11_RF_IO8       GPIO_AF11_RF

#define GPIO_AF11_RF_IO9       GPIO_AF11_RF

#endif /* STM32WBA */

/**

  * @}

  */
@@ -860,6 +890,10 @@ extern "C" { 
#define __HAL_HRTIM_SetCompare        __HAL_HRTIM_SETCOMPARE

#define __HAL_HRTIM_GetCompare        __HAL_HRTIM_GETCOMPARE



#if defined(STM32F3) || defined(STM32G4) || defined(STM32H7)

#define HRTIMInterruptResquests  HRTIMInterruptRequests

#endif /* STM32F3 || STM32G4 || STM32H7 */



#if defined(STM32G4)

#define HAL_HRTIM_ExternalEventCounterConfig    HAL_HRTIM_ExtEventCounterConfig

#define HAL_HRTIM_ExternalEventCounterEnable    HAL_HRTIM_ExtEventCounterEnable
@@ -997,8 +1031,8 @@ extern "C" { 
#define HRTIM_CALIBRATIONRATE_910              (HRTIM_DLLCR_CALRTE_0)

#define HRTIM_CALIBRATIONRATE_114              (HRTIM_DLLCR_CALRTE_1)

#define HRTIM_CALIBRATIONRATE_14               (HRTIM_DLLCR_CALRTE_1 | HRTIM_DLLCR_CALRTE_0)



#endif /* STM32F3 */



/**

  * @}

  */
@@ -1249,10 +1283,10 @@ extern "C" { 
#define RTC_TAMPERPIN_PA0  RTC_TAMPERPIN_POS1

#define RTC_TAMPERPIN_PI8  RTC_TAMPERPIN_POS1



#if defined(STM32H5) || defined(STM32H7RS)

#if defined(STM32H5) || defined(STM32H7RS) || defined(STM32N6)

#define TAMP_SECRETDEVICE_ERASE_NONE        TAMP_DEVICESECRETS_ERASE_NONE

#define TAMP_SECRETDEVICE_ERASE_BKP_SRAM    TAMP_DEVICESECRETS_ERASE_BKPSRAM

#endif /* STM32H5 || STM32H7RS */

#endif /* STM32H5 || STM32H7RS || STM32N6 */



#if defined(STM32WBA)

#define TAMP_SECRETDEVICE_ERASE_NONE            TAMP_DEVICESECRETS_ERASE_NONE
@@ -1264,27 +1298,27 @@ extern "C" { 
#define TAMP_SECRETDEVICE_ERASE_ALL             TAMP_DEVICESECRETS_ERASE_ALL

#endif /* STM32WBA */



#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS)

#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS) || defined(STM32N6)

#define TAMP_SECRETDEVICE_ERASE_DISABLE     TAMP_DEVICESECRETS_ERASE_NONE

#define TAMP_SECRETDEVICE_ERASE_ENABLE      TAMP_SECRETDEVICE_ERASE_ALL

#endif /* STM32H5 || STM32WBA || STM32H7RS */

#endif /* STM32H5 || STM32WBA || STM32H7RS ||  STM32N6 */



#if defined(STM32F7)

#if defined(STM32F7) || defined(STM32WB)

#define RTC_TAMPCR_TAMPXE          RTC_TAMPER_ENABLE_BITS_MASK

#define RTC_TAMPCR_TAMPXIE         RTC_TAMPER_IT_ENABLE_BITS_MASK

#endif /* STM32F7 */

#endif /* STM32F7 || STM32WB */



#if defined(STM32H7)

#define RTC_TAMPCR_TAMPXE          RTC_TAMPER_X

#define RTC_TAMPCR_TAMPXIE         RTC_TAMPER_X_INTERRUPT

#endif /* STM32H7 */



#if defined(STM32F7) || defined(STM32H7) || defined(STM32L0)

#if defined(STM32F7) || defined(STM32H7) || defined(STM32L0) || defined(STM32WB)

#define RTC_TAMPER1_INTERRUPT      RTC_IT_TAMP1

#define RTC_TAMPER2_INTERRUPT      RTC_IT_TAMP2

#define RTC_TAMPER3_INTERRUPT      RTC_IT_TAMP3

#define RTC_ALL_TAMPER_INTERRUPT   RTC_IT_TAMP

#endif /* STM32F7 || STM32H7 || STM32L0 */

#endif /* STM32F7 || STM32H7 || STM32L0 || STM32WB */



/**

  * @}
@@ -1451,7 +1485,7 @@ extern "C" { 
#define TIM_TIM3_TI1_COMP1COMP2_OUT   TIM_TIM3_TI1_COMP1_COMP2

#endif



#if defined(STM32U5)

#if defined(STM32U5) || defined(STM32MP2)

#define OCREF_CLEAR_SELECT_Pos       OCREF_CLEAR_SELECT_POS

#define OCREF_CLEAR_SELECT_Msk       OCREF_CLEAR_SELECT_MSK

#endif
@@ -1817,7 +1851,7 @@ extern "C" { 
#define HAL_FMPI2CEx_AnalogFilter_Config      HAL_FMPI2CEx_ConfigAnalogFilter

#define HAL_FMPI2CEx_DigitalFilter_Config     HAL_FMPI2CEx_ConfigDigitalFilter



#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) ((cmd == ENABLE)? \

#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd) == ENABLE)? \

                                                                HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): \

                                                                HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
@@ -1999,12 +2033,12 @@ extern "C" { 
/** @defgroup HAL_RTC_Aliased_Functions HAL RTC Aliased Functions maintained for legacy purpose

  * @{

  */

#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS)

#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS) || defined(STM32N6)

#define HAL_RTCEx_SetBoothardwareKey            HAL_RTCEx_LockBootHardwareKey

#define HAL_RTCEx_BKUPBlock_Enable              HAL_RTCEx_BKUPBlock

#define HAL_RTCEx_BKUPBlock_Disable             HAL_RTCEx_BKUPUnblock

#define HAL_RTCEx_Erase_SecretDev_Conf          HAL_RTCEx_ConfigEraseDeviceSecrets

#endif /* STM32H5 || STM32WBA || STM32H7RS */

#endif /* STM32H5 || STM32WBA || STM32H7RS || STM32N6 */



/**

  * @}
@@ -2731,6 +2765,12 @@ extern "C" { 
#define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET

#define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET

#define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET

#if defined(STM32C0)

#define __HAL_RCC_APB1_FORCE_RESET    __HAL_RCC_APB1_GRP1_FORCE_RESET

#define __HAL_RCC_APB1_RELEASE_RESET  __HAL_RCC_APB1_GRP1_RELEASE_RESET

#define __HAL_RCC_APB2_FORCE_RESET    __HAL_RCC_APB1_GRP2_FORCE_RESET

#define __HAL_RCC_APB2_RELEASE_RESET  __HAL_RCC_APB1_GRP2_RELEASE_RESET

#endif /* STM32C0 */

#define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE

#define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE

#define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET
@@ -3659,7 +3699,8 @@ extern "C" { 
#endif



#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || \

    defined(STM32WL) || defined(STM32C0) || defined(STM32H7RS) || defined(STM32U0)

      defined(STM32WL) || defined(STM32C0) || defined(STM32N6) || defined(STM32H7RS) || \

      defined(STM32U0)

#define RCC_RTCCLKSOURCE_NO_CLK     RCC_RTCCLKSOURCE_NONE

#else

#define RCC_RTCCLKSOURCE_NONE       RCC_RTCCLKSOURCE_NO_CLK
@@ -3910,7 +3951,8 @@ extern "C" { 
  */

#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || \

    defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \

    defined (STM32WBA) || defined (STM32H5) || defined (STM32C0) || defined (STM32H7RS) ||  defined (STM32U0)

    defined (STM32WBA) || defined (STM32H5) || \

    defined (STM32C0) || defined (STM32N6) || defined (STM32H7RS) || defined (STM32U0) || defined (STM32U3)

#else

#define __HAL_RTC_CLEAR_FLAG                      __HAL_RTC_EXTI_CLEAR_FLAG

#endif
@@ -4204,6 +4246,33 @@ extern "C" { 


#define HAL_PCD_SetTxFiFo                                  HAL_PCDEx_SetTxFiFo

#define HAL_PCD_SetRxFiFo                                  HAL_PCDEx_SetRxFiFo

#if defined(STM32U5)

#define USB_OTG_GOTGCTL_BSESVLD                            USB_OTG_GOTGCTL_BSVLD

#define USB_OTG_GAHBCFG_GINT                               USB_OTG_GAHBCFG_GINTMSK

#define USB_OTG_GUSBCFG_PHYLPCS                            USB_OTG_GUSBCFG_PHYLPC

#define USB_OTG_GRSTCTL_HSRST                              USB_OTG_GRSTCTL_PSRST

#define USB_OTG_GINTSTS_BOUTNAKEFF                         USB_OTG_GINTSTS_GONAKEFF

#define USB_OTG_GINTSTS_WKUINT                             USB_OTG_GINTSTS_WKUPINT

#define USB_OTG_GINTMSK_PXFRM_IISOOXFRM                    USB_OTG_GINTMSK_IPXFRM_IISOOXFRM

#define USB_OTG_GRXSTSP_EPNUM                              USB_OTG_GRXSTSP_EPNUM_CHNUM

#define USB_OTG_GLPMCFG_L1ResumeOK                         USB_OTG_GLPMCFG_L1RSMOK

#define USB_OTG_HPTXFSIZ_PTXFD                             USB_OTG_HPTXFSIZ_PTXFSIZ

#define USB_OTG_HCCHAR_MC                                  USB_OTG_HCCHAR_MCNT

#define USB_OTG_HCCHAR_MC_0                                USB_OTG_HCCHAR_MCNT_0

#define USB_OTG_HCCHAR_MC_1                                USB_OTG_HCCHAR_MCNT_1

#define USB_OTG_HCINTMSK_AHBERR                            USB_OTG_HCINTMSK_AHBERRM

#define USB_OTG_HCTSIZ_DOPING                              USB_OTG_HCTSIZ_DOPNG

#define USB_OTG_DOEPMSK_OPEM                               USB_OTG_DOEPMSK_OUTPKTERRM

#define USB_OTG_DIEPCTL_SODDFRM                            USB_OTG_DIEPCTL_SD1PID_SODDFRM

#define USB_OTG_DIEPTSIZ_MULCNT                            USB_OTG_DIEPTSIZ_MCNT

#define USB_OTG_DOEPCTL_SODDFRM                            USB_OTG_DOEPCTL_SD1PID_SODDFRM

#define USB_OTG_DOEPCTL_DPID                               USB_OTG_DOEPCTL_DPID_EONUM

#define USB_OTG_DOEPTSIZ_STUPCNT                           USB_OTG_DOEPTSIZ_RXDPID

#define USB_OTG_DOEPTSIZ_STUPCNT_0                         USB_OTG_DOEPTSIZ_RXDPID_0

#define USB_OTG_DOEPTSIZ_STUPCNT_1                         USB_OTG_DOEPTSIZ_RXDPID_1

#define USB_OTG_PCGCCTL_STOPCLK                            USB_OTG_PCGCCTL_STPPCLK

#define USB_OTG_PCGCCTL_GATECLK                            USB_OTG_PCGCCTL_GATEHCLK

#endif

/**

  * @}

  */

stm32cube/stm32f7xx/drivers/include/stm32f7xx_hal_adc.h

+1 −1
Original line number Diff line number Diff line
@@ -859,7 +859,7 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc); 
  * @param  _CHANNELNB_ Channel number.

  * @retval None

  */

#define ADC_SMPR2(_SAMPLETIME_, _CHANNELNB_) ((_SAMPLETIME_) << (3 * ((uint32_t)((uint16_t)(_CHANNELNB_)))))

#define ADC_SMPR2(_SAMPLETIME_, _CHANNELNB_) ((_SAMPLETIME_) << ((3UL * ((uint32_t)((uint16_t)(_CHANNELNB_)))) & 0x1FUL))



/**

  * @brief  Set the selected regular channel rank for rank between 1 and 6.

stm32cube/stm32f7xx/drivers/include/stm32f7xx_hal_conf.h

+1 −0
Original line number Diff line number Diff line
@@ -45,6 +45,7 @@ 
#define HAL_DMA_MODULE_ENABLED

#define HAL_DMA2D_MODULE_ENABLED

#define HAL_ETH_MODULE_ENABLED

/* #define HAL_ETH_LEGACY_MODULE_ENABLED */

#define HAL_EXTI_MODULE_ENABLED

#define HAL_FLASH_MODULE_ENABLED

#define HAL_NAND_MODULE_ENABLED

stm32cube/stm32f7xx/drivers/include/stm32f7xx_hal_cryp.h

+7 −3
Original line number Diff line number Diff line
@@ -51,7 +51,8 @@ typedef struct 
  uint32_t DataType;                   /*!< 32-bit data, 16-bit data, 8-bit data or 1-bit string.

                                        This parameter can be a value of @ref CRYP_Data_Type */

  uint32_t KeySize;                    /*!< Used only in AES mode : 128, 192 or 256 bit key length in CRYP1.

                                        128 or 256 bit key length in TinyAES This parameter can be a value of @ref CRYP_Key_Size */

                                        128 or 256 bit key length in TinyAES This parameter can be a value

                                        of @ref CRYP_Key_Size */

  uint32_t *pKey;                      /*!< The key used for encryption/decryption */

  uint32_t *pInitVect;                 /*!< The initialization vector used also as initialization

                                         counter in CTR mode */
@@ -402,8 +403,11 @@ typedef void (*pCRYP_CallbackTypeDef)(CRYP_HandleTypeDef *hcryp); /*!< point 
  */

#define CRYP_FLAG_MASK  0x0000001FU

#if defined(CRYP)

#define __HAL_CRYP_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 24)) == 0x01U)?((((__HANDLE__)->Instance->RISR) & ((__FLAG__) & CRYP_FLAG_MASK)) == ((__FLAG__) & CRYP_FLAG_MASK)): \

                                                   ((((__HANDLE__)->Instance->RISR) & ((__FLAG__) & CRYP_FLAG_MASK)) == ((__FLAG__) & CRYP_FLAG_MASK)))

#define __HAL_CRYP_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 24)) == 0x01U)? \

                                                   ((((__HANDLE__)->Instance->RISR) & ((__FLAG__) \

                                                       & CRYP_FLAG_MASK)) == ((__FLAG__) & CRYP_FLAG_MASK)): \

                                                   ((((__HANDLE__)->Instance->RISR) & ((__FLAG__) & CRYP_FLAG_MASK))\

                                                    == ((__FLAG__) & CRYP_FLAG_MASK)))

#else /* AES*/

#define __HAL_CRYP_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))

#endif /* End AES or CRYP */

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