Commit a12a8ee7 authored by Stephanos Ioannidis's avatar Stephanos Ioannidis Committed by Carles Cufí
Browse files

DSP: Import CMSIS-DSP 1.8.0 (CMSIS 5.7.0) 

This commit imports the library source code of the CMSIS-DSP 1.8.0,
which is part of the CMSIS 5.7.0 release.

Note that this commit only imports the source code required to build
the CMSIS-DSP library and does not import extraneous components such as
the build script and test suite.

Origin: CMSIS_5
License: Apache-2.0
URL: https://github.com/ARM-software/CMSIS_5/tree/5.7.0


commit: a65b7c9a3e6502127fdb80eb288d8cbdf251a6f4
Purpose: Provide DSP functions for Arm devices
Maintained-by: External

Signed-off-by: default avatarStephanos Ioannidis <root@stephanos.io>
parent 2c3439f2

CMSIS/DSP/Include/arm_common_tables.h

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CMSIS/DSP/Include/arm_const_structs.h

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/* ----------------------------------------------------------------------

 * Project:      CMSIS DSP Library

 * Title:        arm_const_structs.h

 * Description:  Constant structs that are initialized for user convenience.

 *               For example, some can be given as arguments to the arm_cfft_f32() function.

 *

 * $Date:        27. January 2017

 * $Revision:    V.1.5.1

 *

 * Target Processor: Cortex-M cores

 * -------------------------------------------------------------------- */

/*

 * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.

 *

 * SPDX-License-Identifier: Apache-2.0

 *

 * Licensed under the Apache License, Version 2.0 (the License); you may

 * not use this file except in compliance with the License.

 * You may obtain a copy of the License at

 *

 * www.apache.org/licenses/LICENSE-2.0

 *

 * Unless required by applicable law or agreed to in writing, software

 * distributed under the License is distributed on an AS IS BASIS, WITHOUT

 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

 * See the License for the specific language governing permissions and

 * limitations under the License.

 */



#ifndef _ARM_CONST_STRUCTS_H

#define _ARM_CONST_STRUCTS_H



#include "arm_math.h"

#include "arm_common_tables.h"



   extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len16;

   extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len32;

   extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len64;

   extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len128;

   extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len256;

   extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len512;

   extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len1024;

   extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len2048;

   extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len4096;



   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;

   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;

   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;

   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;

   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;

   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;

   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;

   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;

   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;



   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;

   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;

   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;

   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;

   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;

   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;

   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;

   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;

   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;



   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;

   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;

   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;

   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;

   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;

   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;

   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;

   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;

   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;



#endif

CMSIS/DSP/Include/arm_helium_utils.h

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/* ----------------------------------------------------------------------

 * Project:      CMSIS DSP Library

 * Title:        arm_helium_utils.h

 * Description:  Utility functions for Helium development

 *

 * $Date:        09. September 2019

 * $Revision:    V.1.5.1

 *

 * Target Processor: Cortex-M cores

 * -------------------------------------------------------------------- */

/*

 * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.

 *

 * SPDX-License-Identifier: Apache-2.0

 *

 * Licensed under the Apache License, Version 2.0 (the License); you may

 * not use this file except in compliance with the License.

 * You may obtain a copy of the License at

 *

 * www.apache.org/licenses/LICENSE-2.0

 *

 * Unless required by applicable law or agreed to in writing, software

 * distributed under the License is distributed on an AS IS BASIS, WITHOUT

 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

 * See the License for the specific language governing permissions and

 * limitations under the License.

 */



#ifndef _ARM_UTILS_HELIUM_H_

#define _ARM_UTILS_HELIUM_H_



/***************************************



Definitions available for MVEF and MVEI



***************************************/

#if defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEF) || defined(ARM_MATH_MVEI)



#define INACTIVELANE            0 /* inactive lane content */





#endif /* defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEF) || defined(ARM_MATH_MVEI) */



/***************************************



Definitions available for MVEF only



***************************************/

#if defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEF)



__STATIC_FORCEINLINE float32_t vecAddAcrossF32Mve(float32x4_t in)

{

    float32_t acc;



    acc = vgetq_lane(in, 0) + vgetq_lane(in, 1) +

          vgetq_lane(in, 2) + vgetq_lane(in, 3);



    return acc;

}



/* newton initial guess */

#define INVSQRT_MAGIC_F32           0x5f3759df



#define INVSQRT_NEWTON_MVE_F32(invSqrt, xHalf, xStart)\

{                                                     \

    float32x4_t tmp;                                  \

                                                      \

    /* tmp = xhalf * x * x */                         \

    tmp = vmulq(xStart, xStart);                      \

    tmp = vmulq(tmp, xHalf);                          \

    /* (1.5f - xhalf * x * x) */                      \

    tmp = vsubq(vdupq_n_f32(1.5f), tmp);              \

    /* x = x*(1.5f-xhalf*x*x); */                     \

    invSqrt = vmulq(tmp, xStart);                     \

}

#endif /* defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEF) */



/***************************************



Definitions available for MVEI only



***************************************/

#if defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEI)





#include "arm_common_tables.h"



/* Following functions are used to transpose matrix in f32 and q31 cases */

__STATIC_INLINE arm_status arm_mat_trans_32bit_2x2_mve(

    uint32_t * pDataSrc,

    uint32_t * pDataDest)

{

    static const uint32x4_t vecOffs = { 0, 2, 1, 3 };

    /*

     *

     * | 0   1 |   =>  |  0   2 |

     * | 2   3 |       |  1   3 |

     *

     */

    uint32x4_t vecIn = vldrwq_u32((uint32_t const *)pDataSrc);

    vstrwq_scatter_shifted_offset_u32(pDataDest, vecOffs, vecIn);



    return (ARM_MATH_SUCCESS);

}



__STATIC_INLINE arm_status arm_mat_trans_32bit_3x3_mve(

    uint32_t * pDataSrc,

    uint32_t * pDataDest)

{

    const uint32x4_t vecOffs1 = { 0, 3, 6, 1};

    const uint32x4_t vecOffs2 = { 4, 7, 2, 5};

    /*

     *

     *  | 0   1   2 |       | 0   3   6 |  4 x 32 flattened version | 0   3   6   1 |

     *  | 3   4   5 |   =>  | 1   4   7 |            =>             | 4   7   2   5 |

     *  | 6   7   8 |       | 2   5   8 |       (row major)         | 8   .   .   . |

     *

     */

    uint32x4_t vecIn1 = vldrwq_u32((uint32_t const *) pDataSrc);

    uint32x4_t vecIn2 = vldrwq_u32((uint32_t const *) &pDataSrc[4]);



    vstrwq_scatter_shifted_offset_u32(pDataDest, vecOffs1, vecIn1);

    vstrwq_scatter_shifted_offset_u32(pDataDest, vecOffs2, vecIn2);



    pDataDest[8] = pDataSrc[8];



    return (ARM_MATH_SUCCESS);

}



__STATIC_INLINE arm_status arm_mat_trans_32bit_4x4_mve(uint32_t * pDataSrc, uint32_t * pDataDest)

{

    /*

     * 4x4 Matrix transposition

     * is 4 x de-interleave operation

     *

     * 0   1   2   3       0   4   8   12

     * 4   5   6   7       1   5   9   13

     * 8   9   10  11      2   6   10  14

     * 12  13  14  15      3   7   11  15

     */



    uint32x4x4_t vecIn;



    vecIn = vld4q((uint32_t const *) pDataSrc);

    vstrwq(pDataDest, vecIn.val[0]);

    pDataDest += 4;

    vstrwq(pDataDest, vecIn.val[1]);

    pDataDest += 4;

    vstrwq(pDataDest, vecIn.val[2]);

    pDataDest += 4;

    vstrwq(pDataDest, vecIn.val[3]);



    return (ARM_MATH_SUCCESS);

}





__STATIC_INLINE arm_status arm_mat_trans_32bit_generic_mve(

    uint16_t    srcRows,

    uint16_t    srcCols,

    uint32_t  * pDataSrc,

    uint32_t  * pDataDest)

{

    uint32x4_t vecOffs;

    uint32_t  i;

    uint32_t  blkCnt;

    uint32_t const *pDataC;

    uint32_t *pDataDestR;

    uint32x4_t vecIn;



    vecOffs = vidupq_u32((uint32_t)0, 1);

    vecOffs = vecOffs * srcCols;



    i = srcCols;

    do

    {

        pDataC = (uint32_t const *) pDataSrc;

        pDataDestR = pDataDest;



        blkCnt = srcRows >> 2;

        while (blkCnt > 0U)

        {

            vecIn = vldrwq_gather_shifted_offset_u32(pDataC, vecOffs);

            vstrwq(pDataDestR, vecIn); 

            pDataDestR += 4;

            pDataC = pDataC + srcCols * 4;

            /*

             * Decrement the blockSize loop counter

             */

            blkCnt--;

        }



        /*

         * tail

         */

        blkCnt = srcRows & 3;

        if (blkCnt > 0U)

        {

            mve_pred16_t p0 = vctp32q(blkCnt);

            vecIn = vldrwq_gather_shifted_offset_u32(pDataC, vecOffs);

            vstrwq_p(pDataDestR, vecIn, p0);

        }



        pDataSrc += 1;

        pDataDest += srcRows;

    }

    while (--i);



    return (ARM_MATH_SUCCESS);

}



#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_FAST_SQRT_Q31_MVE)

__STATIC_INLINE q31x4_t FAST_VSQRT_Q31(q31x4_t vecIn)

{

    q63x2_t         vecTmpLL;

    q31x4_t         vecTmp0, vecTmp1;

    q31_t           scale;

    q63_t           tmp64;

    q31x4_t         vecNrm, vecDst, vecIdx, vecSignBits;





    vecSignBits = vclsq(vecIn);

    vecSignBits = vbicq(vecSignBits, 1);

    /*

     * in = in << no_of_sign_bits;

     */

    vecNrm = vshlq(vecIn, vecSignBits);

    /*

     * index = in >> 24;

     */

    vecIdx = vecNrm >> 24;

    vecIdx = vecIdx << 1;



    vecTmp0 = vldrwq_gather_shifted_offset_s32(sqrtTable_Q31, vecIdx);



    vecIdx = vecIdx + 1;



    vecTmp1 = vldrwq_gather_shifted_offset_s32(sqrtTable_Q31, vecIdx);



    vecTmp1 = vqrdmulhq(vecTmp1, vecNrm);

    vecTmp0 = vecTmp0 - vecTmp1;

    vecTmp1 = vqrdmulhq(vecTmp0, vecTmp0);

    vecTmp1 = vqrdmulhq(vecNrm, vecTmp1);

    vecTmp1 = vdupq_n_s32(0x18000000) - vecTmp1;

    vecTmp0 = vqrdmulhq(vecTmp0, vecTmp1);

    vecTmpLL = vmullbq_int(vecNrm, vecTmp0);



    /*

     * scale elements 0, 2

     */

    scale = 26 + (vecSignBits[0] >> 1);

    tmp64 = asrl(vecTmpLL[0], scale);

    vecDst[0] = (q31_t) tmp64;



    scale = 26 + (vecSignBits[2] >> 1);

    tmp64 = asrl(vecTmpLL[1], scale);

    vecDst[2] = (q31_t) tmp64;



    vecTmpLL = vmulltq_int(vecNrm, vecTmp0);



    /*

     * scale elements 1, 3

     */

    scale = 26 + (vecSignBits[1] >> 1);

    tmp64 = asrl(vecTmpLL[0], scale);

    vecDst[1] = (q31_t) tmp64;



    scale = 26 + (vecSignBits[3] >> 1);

    tmp64 = asrl(vecTmpLL[1], scale);

    vecDst[3] = (q31_t) tmp64;

    /*

     * set negative values to 0

     */

    vecDst = vdupq_m(vecDst, 0, vcmpltq_n_s32(vecIn, 0));



    return vecDst;

}

#endif



#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_FAST_SQRT_Q15_MVE)

__STATIC_INLINE q15x8_t FAST_VSQRT_Q15(q15x8_t vecIn)

{

    q31x4_t         vecTmpLev, vecTmpLodd, vecSignL;

    q15x8_t         vecTmp0, vecTmp1;

    q15x8_t         vecNrm, vecDst, vecIdx, vecSignBits;



    vecDst = vuninitializedq_s16();



    vecSignBits = vclsq(vecIn);

    vecSignBits = vbicq(vecSignBits, 1);

    /*

     * in = in << no_of_sign_bits;

     */

    vecNrm = vshlq(vecIn, vecSignBits);



    vecIdx = vecNrm >> 8;

    vecIdx = vecIdx << 1;



    vecTmp0 = vldrhq_gather_shifted_offset_s16(sqrtTable_Q15, vecIdx);



    vecIdx = vecIdx + 1;



    vecTmp1 = vldrhq_gather_shifted_offset_s16(sqrtTable_Q15, vecIdx);



    vecTmp1 = vqrdmulhq(vecTmp1, vecNrm);

    vecTmp0 = vecTmp0 - vecTmp1;

    vecTmp1 = vqrdmulhq(vecTmp0, vecTmp0);

    vecTmp1 = vqrdmulhq(vecNrm, vecTmp1);

    vecTmp1 = vdupq_n_s16(0x1800) - vecTmp1;

    vecTmp0 = vqrdmulhq(vecTmp0, vecTmp1);



    vecSignBits = vecSignBits >> 1;



    vecTmpLev = vmullbq_int(vecNrm, vecTmp0);

    vecTmpLodd = vmulltq_int(vecNrm, vecTmp0);



    vecTmp0 = vecSignBits + 10;

    /*

     * negate sign to apply register based vshl

     */

    vecTmp0 = -vecTmp0;



    /*

     * shift even elements

     */

    vecSignL = vmovlbq(vecTmp0);

    vecTmpLev = vshlq(vecTmpLev, vecSignL);

    /*

     * shift odd elements

     */

    vecSignL = vmovltq(vecTmp0);

    vecTmpLodd = vshlq(vecTmpLodd, vecSignL);

    /*

     * merge and narrow odd and even parts

     */

    vecDst = vmovnbq_s32(vecDst, vecTmpLev);

    vecDst = vmovntq_s32(vecDst, vecTmpLodd);

    /*

     * set negative values to 0

     */

    vecDst = vdupq_m(vecDst, 0, vcmpltq_n_s16(vecIn, 0));



    return vecDst;

}

#endif



#endif /* defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEI) */



#endif

CMSIS/DSP/Include/arm_math.h

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CMSIS/DSP/Include/arm_mve_tables.h

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/* ----------------------------------------------------------------------

 * Project:      CMSIS DSP Library

 * Title:        arm_mve_tables.h

 * Description:  common tables like fft twiddle factors, Bitreverse, reciprocal etc

 *               used for MVE implementation only

 *

 * $Date:        08. January 2020

 * $Revision:    V1.7.0

 *

 * Target Processor: Cortex-M cores

 * -------------------------------------------------------------------- */

/*

 * Copyright (C) 2010-2020 ARM Limited or its affiliates. All rights reserved.

 *

 * SPDX-License-Identifier: Apache-2.0

 *

 * Licensed under the Apache License, Version 2.0 (the License); you may

 * not use this file except in compliance with the License.

 * You may obtain a copy of the License at

 *

 * www.apache.org/licenses/LICENSE-2.0

 *

 * Unless required by applicable law or agreed to in writing, software

 * distributed under the License is distributed on an AS IS BASIS, WITHOUT

 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

 * See the License for the specific language governing permissions and

 * limitations under the License.

 */



 #ifndef _ARM_MVE_TABLES_H

 #define _ARM_MVE_TABLES_H



 #include "arm_math.h"



 





 



#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)



#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)



#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_16) || defined(ARM_TABLE_TWIDDLECOEF_F32_32)



extern uint32_t rearranged_twiddle_tab_stride1_arr_16_f32[2];

extern uint32_t rearranged_twiddle_tab_stride2_arr_16_f32[2];

extern uint32_t rearranged_twiddle_tab_stride3_arr_16_f32[2];

extern float32_t rearranged_twiddle_stride1_16_f32[8];

extern float32_t rearranged_twiddle_stride2_16_f32[8];

extern float32_t rearranged_twiddle_stride3_16_f32[8];

#endif



#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_64) || defined(ARM_TABLE_TWIDDLECOEF_F32_128)



extern uint32_t rearranged_twiddle_tab_stride1_arr_64_f32[3];

extern uint32_t rearranged_twiddle_tab_stride2_arr_64_f32[3];

extern uint32_t rearranged_twiddle_tab_stride3_arr_64_f32[3];

extern float32_t rearranged_twiddle_stride1_64_f32[40];

extern float32_t rearranged_twiddle_stride2_64_f32[40];

extern float32_t rearranged_twiddle_stride3_64_f32[40];

#endif



#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_256) || defined(ARM_TABLE_TWIDDLECOEF_F32_512)



extern uint32_t rearranged_twiddle_tab_stride1_arr_256_f32[4];

extern uint32_t rearranged_twiddle_tab_stride2_arr_256_f32[4];

extern uint32_t rearranged_twiddle_tab_stride3_arr_256_f32[4];

extern float32_t rearranged_twiddle_stride1_256_f32[168];

extern float32_t rearranged_twiddle_stride2_256_f32[168];

extern float32_t rearranged_twiddle_stride3_256_f32[168];

#endif



#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_1024) || defined(ARM_TABLE_TWIDDLECOEF_F32_2048)



extern uint32_t rearranged_twiddle_tab_stride1_arr_1024_f32[5];

extern uint32_t rearranged_twiddle_tab_stride2_arr_1024_f32[5];

extern uint32_t rearranged_twiddle_tab_stride3_arr_1024_f32[5];

extern float32_t rearranged_twiddle_stride1_1024_f32[680];

extern float32_t rearranged_twiddle_stride2_1024_f32[680];

extern float32_t rearranged_twiddle_stride3_1024_f32[680];

#endif



#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096) || defined(ARM_TABLE_TWIDDLECOEF_F32_8192)



extern uint32_t rearranged_twiddle_tab_stride1_arr_4096_f32[6];

extern uint32_t rearranged_twiddle_tab_stride2_arr_4096_f32[6];

extern uint32_t rearranged_twiddle_tab_stride3_arr_4096_f32[6];

extern float32_t rearranged_twiddle_stride1_4096_f32[2728];

extern float32_t rearranged_twiddle_stride2_4096_f32[2728];

extern float32_t rearranged_twiddle_stride3_4096_f32[2728];

#endif





#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */



#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */







#if defined(ARM_MATH_MVEI) 



#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)



#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_16) || defined(ARM_TABLE_TWIDDLECOEF_Q31_32)



extern uint32_t rearranged_twiddle_tab_stride1_arr_16_q31[2];

extern uint32_t rearranged_twiddle_tab_stride2_arr_16_q31[2];

extern uint32_t rearranged_twiddle_tab_stride3_arr_16_q31[2];

extern q31_t rearranged_twiddle_stride1_16_q31[8];

extern q31_t rearranged_twiddle_stride2_16_q31[8];

extern q31_t rearranged_twiddle_stride3_16_q31[8];

#endif



#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_64) || defined(ARM_TABLE_TWIDDLECOEF_Q31_128)



extern uint32_t rearranged_twiddle_tab_stride1_arr_64_q31[3];

extern uint32_t rearranged_twiddle_tab_stride2_arr_64_q31[3];

extern uint32_t rearranged_twiddle_tab_stride3_arr_64_q31[3];

extern q31_t rearranged_twiddle_stride1_64_q31[40];

extern q31_t rearranged_twiddle_stride2_64_q31[40];

extern q31_t rearranged_twiddle_stride3_64_q31[40];

#endif



#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_256) || defined(ARM_TABLE_TWIDDLECOEF_Q31_512)



extern uint32_t rearranged_twiddle_tab_stride1_arr_256_q31[4];

extern uint32_t rearranged_twiddle_tab_stride2_arr_256_q31[4];

extern uint32_t rearranged_twiddle_tab_stride3_arr_256_q31[4];

extern q31_t rearranged_twiddle_stride1_256_q31[168];

extern q31_t rearranged_twiddle_stride2_256_q31[168];

extern q31_t rearranged_twiddle_stride3_256_q31[168];

#endif



#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) || defined(ARM_TABLE_TWIDDLECOEF_Q31_2048)



extern uint32_t rearranged_twiddle_tab_stride1_arr_1024_q31[5];

extern uint32_t rearranged_twiddle_tab_stride2_arr_1024_q31[5];

extern uint32_t rearranged_twiddle_tab_stride3_arr_1024_q31[5];

extern q31_t rearranged_twiddle_stride1_1024_q31[680];

extern q31_t rearranged_twiddle_stride2_1024_q31[680];

extern q31_t rearranged_twiddle_stride3_1024_q31[680];

#endif



#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) || defined(ARM_TABLE_TWIDDLECOEF_Q31_8192)



extern uint32_t rearranged_twiddle_tab_stride1_arr_4096_q31[6];

extern uint32_t rearranged_twiddle_tab_stride2_arr_4096_q31[6];

extern uint32_t rearranged_twiddle_tab_stride3_arr_4096_q31[6];

extern q31_t rearranged_twiddle_stride1_4096_q31[2728];

extern q31_t rearranged_twiddle_stride2_4096_q31[2728];

extern q31_t rearranged_twiddle_stride3_4096_q31[2728];

#endif





#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */



#endif /* defined(ARM_MATH_MVEI) */







#if defined(ARM_MATH_MVEI) 



#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)



#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_16) || defined(ARM_TABLE_TWIDDLECOEF_Q15_32)



extern uint32_t rearranged_twiddle_tab_stride1_arr_16_q15[2];

extern uint32_t rearranged_twiddle_tab_stride2_arr_16_q15[2];

extern uint32_t rearranged_twiddle_tab_stride3_arr_16_q15[2];

extern q15_t rearranged_twiddle_stride1_16_q15[8];

extern q15_t rearranged_twiddle_stride2_16_q15[8];

extern q15_t rearranged_twiddle_stride3_16_q15[8];

#endif



#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_64) || defined(ARM_TABLE_TWIDDLECOEF_Q15_128)



extern uint32_t rearranged_twiddle_tab_stride1_arr_64_q15[3];

extern uint32_t rearranged_twiddle_tab_stride2_arr_64_q15[3];

extern uint32_t rearranged_twiddle_tab_stride3_arr_64_q15[3];

extern q15_t rearranged_twiddle_stride1_64_q15[40];

extern q15_t rearranged_twiddle_stride2_64_q15[40];

extern q15_t rearranged_twiddle_stride3_64_q15[40];

#endif



#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_256) || defined(ARM_TABLE_TWIDDLECOEF_Q15_512)



extern uint32_t rearranged_twiddle_tab_stride1_arr_256_q15[4];

extern uint32_t rearranged_twiddle_tab_stride2_arr_256_q15[4];

extern uint32_t rearranged_twiddle_tab_stride3_arr_256_q15[4];

extern q15_t rearranged_twiddle_stride1_256_q15[168];

extern q15_t rearranged_twiddle_stride2_256_q15[168];

extern q15_t rearranged_twiddle_stride3_256_q15[168];

#endif



#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) || defined(ARM_TABLE_TWIDDLECOEF_Q15_2048)



extern uint32_t rearranged_twiddle_tab_stride1_arr_1024_q15[5];

extern uint32_t rearranged_twiddle_tab_stride2_arr_1024_q15[5];

extern uint32_t rearranged_twiddle_tab_stride3_arr_1024_q15[5];

extern q15_t rearranged_twiddle_stride1_1024_q15[680];

extern q15_t rearranged_twiddle_stride2_1024_q15[680];

extern q15_t rearranged_twiddle_stride3_1024_q15[680];

#endif



#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) || defined(ARM_TABLE_TWIDDLECOEF_Q15_8192)



extern uint32_t rearranged_twiddle_tab_stride1_arr_4096_q15[6];

extern uint32_t rearranged_twiddle_tab_stride2_arr_4096_q15[6];

extern uint32_t rearranged_twiddle_tab_stride3_arr_4096_q15[6];

extern q15_t rearranged_twiddle_stride1_4096_q15[2728];

extern q15_t rearranged_twiddle_stride2_4096_q15[2728];

extern q15_t rearranged_twiddle_stride3_4096_q15[2728];

#endif





#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */



#endif /* defined(ARM_MATH_MVEI) */







#if defined(ARM_MATH_MVEI) 



#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)





#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */



#endif /* defined(ARM_MATH_MVEI) */







#endif /*_ARM_MVE_TABLES_H*/

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