Core-R: Add missing intrinsics (2c3439f2) · Commits · Wenxi XU / cmsis

CMSIS/Core_R/Include/cmsis_gcc.h

+103 −6

Original line number	Diff line number	Diff line
		/************************************************************************//
		* @file cmsis_gcc.h for CMSIS-Core(R)
		* @brief CMSIS compiler specific macros, functions, instructions
		* @version V1.0.0
		* @date 17. October 2019
		* @version V1.1.0
		* @date 13. April 2020
		******************************************************************************/
		/*
		* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
		* Copyright (c) 2009-2020 Arm Limited. All rights reserved.
		*
		* SPDX-License-Identifier: Apache-2.0
		*
		@@ -118,6 +118,13 @@ __STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
		return(result);
		}

		__STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
		{
		uint32_t result;

		__ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
		return(result);
		}

		__STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
		{
		@@ -127,6 +134,14 @@ __STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
		return(result);
		}

		__STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
		{
		uint32_t result;

		__ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
		return(result);
		}

		__STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2)
		{
		int32_t result;
		@@ -135,6 +150,22 @@ __STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2)
		return(result);
		}

		__STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
		{
		uint32_t result;

		__ASM ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
		return(result);
		}

		__STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
		{
		uint32_t result;

		__ASM ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
		return(result);
		}

		__STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
		{
		union llreg_u{
		@@ -160,6 +191,14 @@ __STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2)
		return(result);
		}

		__STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
		{
		uint32_t result;

		__ASM ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
		return(result);
		}

		__STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
		{
		uint32_t result;
		@@ -173,6 +212,9 @@ __STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
		#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) \| \
		((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )

		#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) \| \
		((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )

		__STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
		{
		uint32_t result;
		@@ -222,6 +264,61 @@ __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
		return(result);
		}

		__STATIC_FORCEINLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
		{
		uint32_t result;

		__ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
		return(result);
		}

		__STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
		{
		uint32_t result;

		__ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
		return(result);
		}

		__STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
		{
		uint32_t result;

		__ASM ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
		return(result);
		}

		__STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
		{
		uint32_t result;

		__ASM ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
		return(result);
		}

		__STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
		{
		uint32_t result;

		__ASM ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
		return(result);
		}

		__STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
		{
		uint32_t result;

		__ASM ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
		return(result);
		}

		__STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
		{
		uint32_t result;

		__ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
		return(result);
		}

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