Commit ffd0bbfb authored by Baolin Wang's avatar Baolin Wang Committed by Bjorn Andersson
Browse files

hwspinlock: Allow drivers to be built with COMPILE_TEST

parent bb6d3fb3
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+6 −6
Original line number Diff line number Diff line
@@ -9,7 +9,7 @@ menuconfig HWSPINLOCK
config HWSPINLOCK_OMAP
	tristate "OMAP Hardware Spinlock device"
	depends on HWSPINLOCK
	depends on ARCH_OMAP4 || SOC_OMAP5 || SOC_DRA7XX || SOC_AM33XX || SOC_AM43XX || ARCH_K3
	depends on ARCH_OMAP4 || SOC_OMAP5 || SOC_DRA7XX || SOC_AM33XX || SOC_AM43XX || ARCH_K3 || COMPILE_TEST
	help
	  Say y here to support the OMAP Hardware Spinlock device (firstly
	  introduced in OMAP4).
@@ -19,7 +19,7 @@ config HWSPINLOCK_OMAP
config HWSPINLOCK_QCOM
	tristate "Qualcomm Hardware Spinlock device"
	depends on HWSPINLOCK
	depends on ARCH_QCOM
	depends on ARCH_QCOM || COMPILE_TEST
	select MFD_SYSCON
	help
	  Say y here to support the Qualcomm Hardware Mutex functionality, which
@@ -31,7 +31,7 @@ config HWSPINLOCK_QCOM
config HWSPINLOCK_SIRF
	tristate "SIRF Hardware Spinlock device"
	depends on HWSPINLOCK
	depends on ARCH_SIRF
	depends on ARCH_SIRF || COMPILE_TEST
	help
	  Say y here to support the SIRF Hardware Spinlock device, which
	  provides a synchronisation mechanism for the various processors
@@ -42,7 +42,7 @@ config HWSPINLOCK_SIRF

config HWSPINLOCK_SPRD
	tristate "SPRD Hardware Spinlock device"
	depends on ARCH_SPRD
	depends on ARCH_SPRD || COMPILE_TEST
	depends on HWSPINLOCK
	help
	  Say y here to support the SPRD Hardware Spinlock device.
@@ -51,7 +51,7 @@ config HWSPINLOCK_SPRD

config HWSPINLOCK_STM32
	tristate "STM32 Hardware Spinlock device"
	depends on MACH_STM32MP157
	depends on MACH_STM32MP157 || COMPILE_TEST
	depends on HWSPINLOCK
	help
	  Say y here to support the STM32 Hardware Spinlock device.
@@ -61,7 +61,7 @@ config HWSPINLOCK_STM32
config HSEM_U8500
	tristate "STE Hardware Semaphore functionality"
	depends on HWSPINLOCK
	depends on ARCH_U8500
	depends on ARCH_U8500 || COMPILE_TEST
	help
	  Say y here to support the STE Hardware Semaphore functionality, which
	  provides a synchronisation mechanism for the various processor on the