Commit ffaf854b authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-apic-for-linus' of... 

Merge branch 'x86-apic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'x86-apic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (24 commits)
  ACPI, x86: expose some IO-APIC routines when CONFIG_ACPI=n
  x86, apic: Slim down stack usage in early_init_lapic_mapping()
  x86, ioapic: Get rid of needless check and simplify ioapic_setup_resources()
  x86, ioapic: Define IO_APIC_DEFAULT_PHYS_BASE constant
  x86: Fix x86_model test in es7000_apic_is_cluster()
  x86, apic: Move dmar_table_init() out of enable_IR()
  x86, ioapic: Panic on irq-pin binding only if needed
  x86/apic: Enable x2APIC without interrupt remapping under KVM
  x86, apic: Drop redundant bit assignment
  x86, ioapic: Throw BUG instead of NULL dereference
  x86, ioapic: Introduce for_each_irq_pin() helper
  x86: Remove superfluous NULL pointer check in destroy_irq()
  x86/ioapic.c: unify ioapic_retrigger_irq()
  x86/ioapic.c: convert __target_IO_APIC_irq to conventional for() loop
  x86/ioapic.c: clean up replace_pin_at_irq_node logic and comments
  x86/ioapic.c: convert replace_pin_at_irq_node to conventional for() loop
  x86/ioapic.c: simplify add_pin_to_irq_node()
  x86/ioapic.c: convert io_apic_level_ack_pending loop to normal for() loop
  x86/ioapic.c: move lost comment to what seems like appropriate place
  x86/ioapic.c: remove redundant declaration of irq_pin_list
  ...
parents 86d71014 eebc57f7

arch/x86/include/asm/apic.h

+7 −0
Original line number Diff line number Diff line
@@ -183,6 +183,10 @@ static inline int x2apic_enabled(void) 
}



#define x2apic_supported()	(cpu_has_x2apic)

static inline void x2apic_force_phys(void)

{

	x2apic_phys = 1;

}

#else

static inline void check_x2apic(void)

{
@@ -194,6 +198,9 @@ static inline int x2apic_enabled(void) 
{

	return 0;

}

static inline void x2apic_force_phys(void)

{

}



#define	x2apic_preenabled 0

#define	x2apic_supported()	0

arch/x86/include/asm/apicdef.h

+2 −1
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ 
 * Ingo Molnar <mingo@redhat.com>, 1999, 2000

 */



#define IO_APIC_DEFAULT_PHYS_BASE	0xfec00000

#define	APIC_DEFAULT_PHYS_BASE		0xfee00000



#define	APIC_ID		0x20

arch/x86/include/asm/io_apic.h

+11 −2
Original line number Diff line number Diff line
@@ -150,11 +150,10 @@ extern int timer_through_8259; 
#define io_apic_assign_pci_irqs \

	(mp_irq_entries && !skip_ioapic_setup && io_apic_irqs)



#ifdef CONFIG_ACPI

extern u8 io_apic_unique_id(u8 id);

extern int io_apic_get_unique_id(int ioapic, int apic_id);

extern int io_apic_get_version(int ioapic);

extern int io_apic_get_redir_entries(int ioapic);

#endif /* CONFIG_ACPI */



struct io_apic_irq_attr;

extern int io_apic_set_pci_routing(struct device *dev, int irq,
@@ -177,6 +176,16 @@ extern int setup_ioapic_entry(int apic, int irq, 
			      int polarity, int vector, int pin);

extern void ioapic_write_entry(int apic, int pin,

			       struct IO_APIC_route_entry e);



struct mp_ioapic_gsi{

	int gsi_base;

	int gsi_end;

};

extern struct mp_ioapic_gsi  mp_gsi_routing[];

int mp_find_ioapic(int gsi);

int mp_find_ioapic_pin(int ioapic, int gsi);

void __init mp_register_ioapic(int id, u32 address, u32 gsi_base);



#else  /* !CONFIG_X86_IO_APIC */

#define io_apic_assign_pci_irqs 0

static const int timer_through_8259 = 0;

arch/x86/kernel/acpi/boot.c

+2 −103
Original line number Diff line number Diff line
@@ -833,106 +833,6 @@ static int __init acpi_parse_madt_lapic_entries(void) 
extern int es7000_plat;

#endif



static struct {

	int gsi_base;

	int gsi_end;

} mp_ioapic_routing[MAX_IO_APICS];



int mp_find_ioapic(int gsi)

{

	int i = 0;



	/* Find the IOAPIC that manages this GSI. */

	for (i = 0; i < nr_ioapics; i++) {

		if ((gsi >= mp_ioapic_routing[i].gsi_base)

		    && (gsi <= mp_ioapic_routing[i].gsi_end))

			return i;

	}



	printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi);

	return -1;

}



int mp_find_ioapic_pin(int ioapic, int gsi)

{

	if (WARN_ON(ioapic == -1))

		return -1;

	if (WARN_ON(gsi > mp_ioapic_routing[ioapic].gsi_end))

		return -1;



	return gsi - mp_ioapic_routing[ioapic].gsi_base;

}



static u8 __init uniq_ioapic_id(u8 id)

{

#ifdef CONFIG_X86_32

	if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) &&

	    !APIC_XAPIC(apic_version[boot_cpu_physical_apicid]))

		return io_apic_get_unique_id(nr_ioapics, id);

	else

		return id;

#else

	int i;

	DECLARE_BITMAP(used, 256);

	bitmap_zero(used, 256);

	for (i = 0; i < nr_ioapics; i++) {

		struct mpc_ioapic *ia = &mp_ioapics[i];

		__set_bit(ia->apicid, used);

	}

	if (!test_bit(id, used))

		return id;

	return find_first_zero_bit(used, 256);

#endif

}



static int bad_ioapic(unsigned long address)

{

	if (nr_ioapics >= MAX_IO_APICS) {

		printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "

		       "(found %d)\n", MAX_IO_APICS, nr_ioapics);

		panic("Recompile kernel with bigger MAX_IO_APICS!\n");

	}

	if (!address) {

		printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"

		       " found in table, skipping!\n");

		return 1;

	}

	return 0;

}



void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)

{

	int idx = 0;



	if (bad_ioapic(address))

		return;



	idx = nr_ioapics;



	mp_ioapics[idx].type = MP_IOAPIC;

	mp_ioapics[idx].flags = MPC_APIC_USABLE;

	mp_ioapics[idx].apicaddr = address;



	set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);

	mp_ioapics[idx].apicid = uniq_ioapic_id(id);

	mp_ioapics[idx].apicver = io_apic_get_version(idx);



	/*

	 * Build basic GSI lookup table to facilitate gsi->io_apic lookups

	 * and to prevent reprogramming of IOAPIC pins (PCI GSIs).

	 */

	mp_ioapic_routing[idx].gsi_base = gsi_base;

	mp_ioapic_routing[idx].gsi_end = gsi_base +

	    io_apic_get_redir_entries(idx);



	printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%x, "

	       "GSI %d-%d\n", idx, mp_ioapics[idx].apicid,

	       mp_ioapics[idx].apicver, mp_ioapics[idx].apicaddr,

	       mp_ioapic_routing[idx].gsi_base, mp_ioapic_routing[idx].gsi_end);



	nr_ioapics++;

}



int __init acpi_probe_gsi(void)

{

	int idx;
@@ -947,7 +847,7 @@ int __init acpi_probe_gsi(void) 


	max_gsi = 0;

	for (idx = 0; idx < nr_ioapics; idx++) {

		gsi = mp_ioapic_routing[idx].gsi_end;

		gsi = mp_gsi_routing[idx].gsi_end;



		if (gsi > max_gsi)

			max_gsi = gsi;
@@ -1179,9 +1079,8 @@ static int __init acpi_parse_madt_ioapic_entries(void) 
	 * If MPS is present, it will handle them,

	 * otherwise the system will stay in PIC mode

	 */

	if (acpi_disabled || acpi_noirq) {

	if (acpi_disabled || acpi_noirq)

		return -ENODEV;

	}



	if (!cpu_has_apic)

		return -ENODEV;

arch/x86/kernel/apic/apic.c

+59 −51
Original line number Diff line number Diff line
@@ -49,6 +49,7 @@ 
#include <asm/mtrr.h>

#include <asm/smp.h>

#include <asm/mce.h>

#include <asm/kvm_para.h>



unsigned int num_processors;
@@ -1361,52 +1362,80 @@ void enable_x2apic(void) 
}

#endif /* CONFIG_X86_X2APIC */



void __init enable_IR_x2apic(void)

int __init enable_IR(void)

{

#ifdef CONFIG_INTR_REMAP

	int ret;

	unsigned long flags;

	struct IO_APIC_route_entry **ioapic_entries = NULL;



	ret = dmar_table_init();

	if (ret) {

		pr_debug("dmar_table_init() failed with %d:\n", ret);

		goto ir_failed;

	}



	if (!intr_remapping_supported()) {

		pr_debug("intr-remapping not supported\n");

		goto ir_failed;

		return 0;

	}





	if (!x2apic_preenabled && skip_ioapic_setup) {

		pr_info("Skipped enabling intr-remap because of skipping "

			"io-apic setup\n");

		return;

		return 0;

	}



	if (enable_intr_remapping(x2apic_supported()))

		return 0;



	pr_info("Enabled Interrupt-remapping\n");



	return 1;



#endif

	return 0;

}



void __init enable_IR_x2apic(void)

{

	unsigned long flags;

	struct IO_APIC_route_entry **ioapic_entries = NULL;

	int ret, x2apic_enabled = 0;

	int dmar_table_init_ret = 0;



#ifdef CONFIG_INTR_REMAP

	dmar_table_init_ret = dmar_table_init();

	if (dmar_table_init_ret)

		pr_debug("dmar_table_init() failed with %d:\n",

				dmar_table_init_ret);

#endif



	ioapic_entries = alloc_ioapic_entries();

	if (!ioapic_entries) {

		pr_info("Allocate ioapic_entries failed: %d\n", ret);

		goto end;

		pr_err("Allocate ioapic_entries failed\n");

		goto out;

	}



	ret = save_IO_APIC_setup(ioapic_entries);

	if (ret) {

		pr_info("Saving IO-APIC state failed: %d\n", ret);

		goto end;

		goto out;

	}



	local_irq_save(flags);

	mask_IO_APIC_setup(ioapic_entries);

	mask_8259A();

	mask_IO_APIC_setup(ioapic_entries);



	ret = enable_intr_remapping(x2apic_supported());

	if (ret)

		goto end_restore;

	if (dmar_table_init_ret)

		ret = 0;

	else

		ret = enable_IR();



	pr_info("Enabled Interrupt-remapping\n");

	if (!ret) {

		/* IR is required if there is APIC ID > 255 even when running

		 * under KVM

		 */

		if (max_physical_apicid > 255 || !kvm_para_available())

			goto nox2apic;

		/*

		 * without IR all CPUs can be addressed by IOAPIC/MSI

		 * only in physical mode

		 */

		x2apic_force_phys();

	}



	x2apic_enabled = 1;



	if (x2apic_supported() && !x2apic_mode) {

		x2apic_mode = 1;
@@ -1414,41 +1443,25 @@ void __init enable_IR_x2apic(void) 
		pr_info("Enabled x2apic\n");

	}



end_restore:

	if (ret)

		/*

		 * IR enabling failed

		 */

nox2apic:

	if (!ret) /* IR enabling failed */

		restore_IO_APIC_setup(ioapic_entries);



	unmask_8259A();

	local_irq_restore(flags);



end:

out:

	if (ioapic_entries)

		free_ioapic_entries(ioapic_entries);



	if (!ret)

	if (x2apic_enabled)

		return;



ir_failed:

	if (x2apic_preenabled)

		panic("x2apic enabled by bios. But IR enabling failed");

		panic("x2apic: enabled by BIOS but kernel init failed.");

	else if (cpu_has_x2apic)

		pr_info("Not enabling x2apic,Intr-remapping\n");

#else

	if (!cpu_has_x2apic)

		return;



	if (x2apic_preenabled)

		panic("x2apic enabled prior OS handover,"

		      " enable CONFIG_X86_X2APIC, CONFIG_INTR_REMAP");

#endif



	return;

		pr_info("Not enabling x2apic, Intr-remapping init failed.\n");

}





#ifdef CONFIG_X86_64

/*

 * Detect and enable local APICs on non-SMP boards.
@@ -1549,8 +1562,6 @@ no_apic: 
#ifdef CONFIG_X86_64

void __init early_init_lapic_mapping(void)

{

	unsigned long phys_addr;



	/*

	 * If no local APIC can be found then go out

	 * : it means there is no mpatable and MADT
@@ -1558,11 +1569,9 @@ void __init early_init_lapic_mapping(void) 
	if (!smp_found_config)

		return;



	phys_addr = mp_lapic_addr;



	set_fixmap_nocache(FIX_APIC_BASE, phys_addr);

	set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr);

	apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n",

		    APIC_BASE, phys_addr);

		    APIC_BASE, mp_lapic_addr);



	/*

	 * Fetch the APIC ID of the BSP in case we have a
@@ -1651,7 +1660,6 @@ int __init APIC_init_uniprocessor(void) 
	    APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {

		pr_err("BIOS bug, local APIC 0x%x not detected!...\n",

			boot_cpu_physical_apicid);

		clear_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC);

		return -1;

	}

#endif

CRA Git | Maintained and supported by SUSTech CRA and CCSE