Commit ff881842 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'edac_for_5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras 

Pull EDAC updates from Borislav Petkov:
 "The new thing this time around is that we have three maintainers now
  and a new, old repo. New because it is new for the EDAC tree which is
  hosted there from now on and old because it is Tony's and mine's old
  RAS repo which we still use occasionally when the stuff isn't in tip.

  Summary:

   -  EDAC tree has three maintainers and one new designated reviewer
      now, so that the work can scale better.

   -  New driver for Mellanox' BlueField SoC DDR controller (Shravan
      Kumar Ramani)

   -  AMD Rome support in amd64_edac (Yazen Ghannam and Isaac Vaughn)

   -  Misc fixes, cleanups and code improvements"

* tag 'edac_for_5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras:
  EDAC/amd64: Add PCI device IDs for family 17h, model 70h
  MAINTAINERS: Add Robert as a EDAC reviewer
  EDAC/mc_sysfs: Make debug messages consistent
  EDAC/mc_sysfs: Remove pointless gotos
  EDAC: Prefer 'unsigned int' to bare use of 'unsigned'
  EDAC/amd64: Support asymmetric dual-rank DIMMs
  EDAC/amd64: Cache secondary Chip Select registers
  EDAC/amd64: Decode syndrome before translating address
  EDAC/amd64: Find Chip Select memory size using Address Mask
  EDAC/amd64: Initialize DIMM info for systems with more than two channels
  EDAC/amd64: Recognize DRAM device type ECC capability
  EDAC/amd64: Support more than two controllers for chip selects handling
  EDAC/mc: Cleanup _edac_mc_free() code
  EDAC, pnd2: Fix ioremap() size in dnv_rd_reg()
  EDAC, mellanox: Add ECC support for BlueField DDR4
  EDAC/altera: Use the proper type for the IRQ status bits
  EDAC/mc: Fix grain_bits calculation
  edac: altera: Move Stratix10 SDRAM ECC to peripheral
  MAINTAINERS: update EDAC entry to reflect current tree and maintainers
parents a7bd4bcf 3e443eb3

MAINTAINERS

+8 −2
Original line number Diff line number Diff line
@@ -5761,6 +5761,11 @@ S: Supported 
F:	drivers/edac/aspeed_edac.c

F:	Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt



EDAC-BLUEFIELD

M:	Shravan Kumar Ramani <sramani@mellanox.com>

S:	Supported

F:	drivers/edac/bluefield_edac.c



EDAC-CALXEDA

M:	Robert Richter <rric@kernel.org>

L:	linux-edac@vger.kernel.org
@@ -5785,10 +5790,11 @@ F: drivers/edac/thunderx_edac* 
EDAC-CORE

M:	Borislav Petkov <bp@alien8.de>

M:	Mauro Carvalho Chehab <mchehab@kernel.org>

M:	Tony Luck <tony.luck@intel.com>

R:	James Morse <james.morse@arm.com>

R:	Robert Richter <rrichter@marvell.com>

L:	linux-edac@vger.kernel.org

T:	git git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp.git for-next

T:	git git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-edac.git linux_next

T:	git git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras.git edac-for-next

S:	Supported

F:	Documentation/admin-guide/ras.rst

F:	Documentation/driver-api/edac.rst

drivers/edac/Kconfig

+7 −0
Original line number Diff line number Diff line
@@ -510,4 +510,11 @@ config EDAC_ASPEED 
	  First, ECC must be configured in the bootloader. Then, this driver

	  will expose error counters via the EDAC kernel framework.



config EDAC_BLUEFIELD

	tristate "Mellanox BlueField Memory ECC"

	depends on ARM64 && ((MELLANOX_PLATFORM && ACPI) || COMPILE_TEST)

	help

	  Support for error detection and correction on the

	  Mellanox BlueField SoCs.



endif # EDAC

drivers/edac/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -85,3 +85,4 @@ obj-$(CONFIG_EDAC_XGENE) += xgene_edac.o 
obj-$(CONFIG_EDAC_TI)			+= ti_edac.o

obj-$(CONFIG_EDAC_QCOM)			+= qcom_edac.o

obj-$(CONFIG_EDAC_ASPEED)		+= aspeed_edac.o

obj-$(CONFIG_EDAC_BLUEFIELD)		+= bluefield_edac.o

drivers/edac/altera_edac.c

+53 −5
Original line number Diff line number Diff line
@@ -222,7 +222,6 @@ static unsigned long get_total_mem(void) 
static const struct of_device_id altr_sdram_ctrl_of_match[] = {

	{ .compatible = "altr,sdram-edac", .data = &c5_data},

	{ .compatible = "altr,sdram-edac-a10", .data = &a10_data},

	{ .compatible = "altr,sdram-edac-s10", .data = &a10_data},

	{},

};

MODULE_DEVICE_TABLE(of, altr_sdram_ctrl_of_match);
@@ -1170,6 +1169,24 @@ static int __init __maybe_unused altr_init_a10_ecc_device_type(char *compat) 
	return 0;

}



/*********************** SDRAM EDAC Device Functions *********************/



#ifdef CONFIG_EDAC_ALTERA_SDRAM



static const struct edac_device_prv_data s10_sdramecc_data = {

	.setup = altr_check_ecc_deps,

	.ce_clear_mask = ALTR_S10_ECC_SERRPENA,

	.ue_clear_mask = ALTR_S10_ECC_DERRPENA,

	.ecc_enable_mask = ALTR_S10_ECC_EN,

	.ecc_en_ofst = ALTR_S10_ECC_CTRL_SDRAM_OFST,

	.ce_set_mask = ALTR_S10_ECC_TSERRA,

	.ue_set_mask = ALTR_S10_ECC_TDERRA,

	.set_err_ofst = ALTR_S10_ECC_INTTEST_OFST,

	.ecc_irq_handler = altr_edac_a10_ecc_irq,

	.inject_fops = &altr_edac_a10_device_inject_fops,

};

#endif /* CONFIG_EDAC_ALTERA_SDRAM */



/*********************** OCRAM EDAC Device Functions *********************/



#ifdef CONFIG_EDAC_ALTERA_OCRAM
@@ -1758,6 +1775,9 @@ static const struct of_device_id altr_edac_a10_device_of_match[] = { 
#endif

#ifdef CONFIG_EDAC_ALTERA_SDMMC

	{ .compatible = "altr,socfpga-sdmmc-ecc", .data = &a10_sdmmcecca_data },

#endif

#ifdef CONFIG_EDAC_ALTERA_SDRAM

	{ .compatible = "altr,sdram-edac-s10", .data = &s10_sdramecc_data },

#endif

	{},

};
@@ -1866,6 +1886,7 @@ static void altr_edac_a10_irq_handler(struct irq_desc *desc) 
	struct altr_arria10_edac *edac = irq_desc_get_handler_data(desc);

	struct irq_chip *chip = irq_desc_get_chip(desc);

	int irq = irq_desc_get_irq(desc);

	unsigned long bits;



	dberr = (irq == edac->db_irq) ? 1 : 0;

	sm_offset = dberr ? A10_SYSMGR_ECC_INTSTAT_DERR_OFST :
@@ -1875,7 +1896,8 @@ static void altr_edac_a10_irq_handler(struct irq_desc *desc) 


	regmap_read(edac->ecc_mgr_map, sm_offset, &irq_status);



	for_each_set_bit(bit, (unsigned long *)&irq_status, 32) {

	bits = irq_status;

	for_each_set_bit(bit, &bits, 32) {

		irq = irq_linear_revmap(edac->domain, dberr * 32 + bit);

		if (irq)

			generic_handle_irq(irq);
@@ -1889,6 +1911,10 @@ static int validate_parent_available(struct device_node *np) 
	struct device_node *parent;

	int ret = 0;



	/* SDRAM must be present for Linux (implied parent) */

	if (of_device_is_compatible(np, "altr,sdram-edac-s10"))

		return 0;



	/* Ensure parent device is enabled if parent node exists */

	parent = of_parse_phandle(np, "altr,ecc-parent", 0);

	if (parent && !of_device_is_available(parent))
@@ -1898,6 +1924,22 @@ static int validate_parent_available(struct device_node *np) 
	return ret;

}



static int get_s10_sdram_edac_resource(struct device_node *np,

				       struct resource *res)

{

	struct device_node *parent;

	int ret;



	parent = of_parse_phandle(np, "altr,sdr-syscon", 0);

	if (!parent)

		return -ENODEV;



	ret = of_address_to_resource(parent, 0, res);

	of_node_put(parent);



	return ret;

}



static int altr_edac_a10_device_add(struct altr_arria10_edac *edac,

				    struct device_node *np)

{
@@ -1925,7 +1967,11 @@ static int altr_edac_a10_device_add(struct altr_arria10_edac *edac, 
	if (!devres_open_group(edac->dev, altr_edac_a10_device_add, GFP_KERNEL))

		return -ENOMEM;



	if (of_device_is_compatible(np, "altr,sdram-edac-s10"))

		rc = get_s10_sdram_edac_resource(np, &res);

	else

		rc = of_address_to_resource(np, 0, &res);



	if (rc < 0) {

		edac_printk(KERN_ERR, EDAC_DEVICE,

			    "%s: no resource address\n", ecc_name);
@@ -2231,13 +2277,15 @@ static int altr_edac_a10_probe(struct platform_device *pdev) 
		    of_device_is_compatible(child, "altr,socfpga-dma-ecc") ||

		    of_device_is_compatible(child, "altr,socfpga-usb-ecc") ||

		    of_device_is_compatible(child, "altr,socfpga-qspi-ecc") ||

#ifdef CONFIG_EDAC_ALTERA_SDRAM

		    of_device_is_compatible(child, "altr,sdram-edac-s10") ||

#endif

		    of_device_is_compatible(child, "altr,socfpga-sdmmc-ecc"))



			altr_edac_a10_device_add(edac, child);



#ifdef CONFIG_EDAC_ALTERA_SDRAM

		else if ((of_device_is_compatible(child, "altr,sdram-edac-a10")) ||

			 (of_device_is_compatible(child, "altr,sdram-edac-s10")))

		else if (of_device_is_compatible(child, "altr,sdram-edac-a10"))

			of_platform_populate(pdev->dev.of_node,

					     altr_sdram_ctrl_of_match,

					     NULL, &pdev->dev);

drivers/edac/altera_edac.h

+24 −1
Original line number Diff line number Diff line
@@ -289,6 +289,29 @@ struct altr_sdram_mc_data { 
#define ALTR_A10_ECC_INIT_WATCHDOG_10US      10000



/************* Stratix10 Defines **************/

#define ALTR_S10_ECC_CTRL_SDRAM_OFST      0x00

#define ALTR_S10_ECC_EN                   BIT(0)



#define ALTR_S10_ECC_ERRINTEN_OFST        0x10

#define ALTR_S10_ECC_ERRINTENS_OFST       0x14

#define ALTR_S10_ECC_ERRINTENR_OFST       0x18

#define ALTR_S10_ECC_SERRINTEN            BIT(0)



#define ALTR_S10_ECC_INTMODE_OFST         0x1C

#define ALTR_S10_ECC_INTMODE              BIT(0)



#define ALTR_S10_ECC_INTSTAT_OFST         0x20

#define ALTR_S10_ECC_SERRPENA             BIT(0)

#define ALTR_S10_ECC_DERRPENA             BIT(8)

#define ALTR_S10_ECC_ERRPENA_MASK         (ALTR_S10_ECC_SERRPENA | \

					   ALTR_S10_ECC_DERRPENA)



#define ALTR_S10_ECC_INTTEST_OFST         0x24

#define ALTR_S10_ECC_TSERRA               BIT(0)

#define ALTR_S10_ECC_TDERRA               BIT(8)

#define ALTR_S10_ECC_TSERRB               BIT(16)

#define ALTR_S10_ECC_TDERRB               BIT(24)



#define ALTR_S10_DERR_ADDRA_OFST          0x2C



/* Stratix10 ECC Manager Defines */
@@ -300,7 +323,7 @@ struct altr_sdram_mc_data { 
#define S10_SYSMGR_UE_ADDR_OFST           0x224



#define S10_DDR0_IRQ_MASK                 BIT(16)

#define S10_DBE_IRQ_MASK                  0x3FE

#define S10_DBE_IRQ_MASK                  0x3FFFE



/* Define ECC Block Offsets for peripherals */

#define ECC_BLK_ADDRESS_OFST              0x40

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