Commit ff609143 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge branch 'vexpress-v3.5-rc6' of git://git.linaro.org/people/pawelmoll/linux into next/soc 

From Pawel Moll <pawel.moll@arm.com>:

Versatile Express updates for v3.6

* 'vexpress-v3.5-rc6' of git://git.linaro.org/people/pawelmoll/linux

:
  ARM: vexpress: Config option for early printk console
  ARM: vexpress: Add Device Tree for V2P-CA15_CA7 core tile
  ARM: vexpress: Convert V2P-CA15 Device Tree to 64 bit addresses
  ARM: vexpress: Add fixed regulator for SMSC
  ARM: vexpress: Add missing SP804 interrupt in motherboard's DTS files
  ARM: vexpress: Initial common clock support
  ARM: versatile: Make plat-versatile clock optional
  ARM: vexpress: Check master site in daughterboard's sysctl operations
  ARM: vexpress: remove automatic errata workaround selection

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 478e1a14 1b820eaf

arch/arm/Kconfig

+5 −1
Original line number Diff line number Diff line
@@ -260,6 +260,7 @@ config ARCH_INTEGRATOR 
	select ICST

	select GENERIC_CLOCKEVENTS

	select PLAT_VERSATILE

	select PLAT_VERSATILE_CLOCK

	select PLAT_VERSATILE_FPGA_IRQ

	select NEED_MACH_IO_H

	select NEED_MACH_MEMORY_H
@@ -277,6 +278,7 @@ config ARCH_REALVIEW 
	select GENERIC_CLOCKEVENTS

	select ARCH_WANT_OPTIONAL_GPIOLIB

	select PLAT_VERSATILE

	select PLAT_VERSATILE_CLOCK

	select PLAT_VERSATILE_CLCD

	select ARM_TIMER_SP804

	select GPIO_PL061 if GPIOLIB
@@ -295,6 +297,7 @@ config ARCH_VERSATILE 
	select ARCH_WANT_OPTIONAL_GPIOLIB

	select NEED_MACH_IO_H if PCI

	select PLAT_VERSATILE

	select PLAT_VERSATILE_CLOCK

	select PLAT_VERSATILE_CLCD

	select PLAT_VERSATILE_FPGA_IRQ

	select ARM_TIMER_SP804
@@ -307,7 +310,7 @@ config ARCH_VEXPRESS 
	select ARM_AMBA

	select ARM_TIMER_SP804

	select CLKDEV_LOOKUP

	select HAVE_MACH_CLKDEV

	select COMMON_CLK

	select GENERIC_CLOCKEVENTS

	select HAVE_CLK

	select HAVE_PATA_PLATFORM
@@ -315,6 +318,7 @@ config ARCH_VEXPRESS 
	select NO_IOPORT

	select PLAT_VERSATILE

	select PLAT_VERSATILE_CLCD

	select REGULATOR_FIXED_VOLTAGE if REGULATOR

	help

	  This enables support for the ARM Ltd Versatile Express boards.

arch/arm/Kconfig.debug

+26 −0
Original line number Diff line number Diff line
@@ -310,6 +310,32 @@ choice 
		  The uncompressor code port configuration is now handled

		  by CONFIG_S3C_LOWLEVEL_UART_PORT.



	config DEBUG_VEXPRESS_UART0_DETECT

		bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"

		depends on ARCH_VEXPRESS && CPU_CP15_MMU

		help

		  This option enables a simple heuristic which tries to determine

		  the motherboard's memory map variant (original or RS1) and then

		  choose the relevant UART0 base address.



		  Note that this will only work with standard A-class core tiles,

		  and may fail with non-standard SMM or custom software models.



	config DEBUG_VEXPRESS_UART0_CA9

		bool "Use PL011 UART0 at 0x10009000 (V2P-CA9 core tile)"

		depends on ARCH_VEXPRESS

		help

		  This option selects UART0 at 0x10009000. Except for custom models,

		  this applies only to the V2P-CA9 tile.



	config DEBUG_VEXPRESS_UART0_RS1

		bool "Use PL011 UART0 at 0x1c090000 (RS1 complaint tiles)"

		depends on ARCH_VEXPRESS

		help

		  This option selects UART0 at 0x1c090000. This applies to most

		  of the tiles using the RS1 memory map, including all new A-class

		  core tiles, FPGA-based SMMs and software models.



	config DEBUG_LL_UART_NONE

		bool "No low-level debugging UART"

		help

arch/arm/boot/dts/vexpress-v2m-rs1.dtsi

+11 −0
Original line number Diff line number Diff line
@@ -55,6 +55,8 @@ 
			reg-io-width = <4>;

			smsc,irq-active-high;

			smsc,irq-push-pull;

			vdd33a-supply = <&v2m_fixed_3v3>;

			vddvario-supply = <&v2m_fixed_3v3>;

		};



		usb@2,03000000 {
@@ -157,6 +159,7 @@ 
			v2m_timer23: timer@120000 {

				compatible = "arm,sp804", "arm,primecell";

				reg = <0x120000 0x1000>;

				interrupts = <3>;

			};



			/* DVI I2C bus */
@@ -197,5 +200,13 @@ 
				interrupts = <14>;

			};

		};



		v2m_fixed_3v3: fixedregulator@0 {

			compatible = "regulator-fixed";

			regulator-name = "3V3";

			regulator-min-microvolt = <3300000>;

			regulator-max-microvolt = <3300000>;

			regulator-always-on;

		};

	};

};

arch/arm/boot/dts/vexpress-v2m.dtsi

+11 −0
Original line number Diff line number Diff line
@@ -54,6 +54,8 @@ 
			reg-io-width = <4>;

			smsc,irq-active-high;

			smsc,irq-push-pull;

			vdd33a-supply = <&v2m_fixed_3v3>;

			vddvario-supply = <&v2m_fixed_3v3>;

		};



		usb@3,03000000 {
@@ -156,6 +158,7 @@ 
			v2m_timer23: timer@12000 {

				compatible = "arm,sp804", "arm,primecell";

				reg = <0x12000 0x1000>;

				interrupts = <3>;

			};



			/* DVI I2C bus */
@@ -196,5 +199,13 @@ 
				interrupts = <14>;

			};

		};



		v2m_fixed_3v3: fixedregulator@0 {

			compatible = "regulator-fixed";

			regulator-name = "3V3";

			regulator-min-microvolt = <3300000>;

			regulator-max-microvolt = <3300000>;

			regulator-always-on;

		};

	};

};

arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts

+18 −18
Original line number Diff line number Diff line
@@ -14,8 +14,8 @@ 
	arm,hbi = <0x237>;

	compatible = "arm,vexpress,v2p-ca15,tc1", "arm,vexpress,v2p-ca15", "arm,vexpress";

	interrupt-parent = <&gic>;

	#address-cells = <1>;

	#size-cells = <1>;

	#address-cells = <2>;

	#size-cells = <2>;



	chosen { };
@@ -47,23 +47,23 @@ 


	memory@80000000 {

		device_type = "memory";

		reg = <0x80000000 0x40000000>;

		reg = <0 0x80000000 0 0x40000000>;

	};



	hdlcd@2b000000 {

		compatible = "arm,hdlcd";

		reg = <0x2b000000 0x1000>;

		reg = <0 0x2b000000 0 0x1000>;

		interrupts = <0 85 4>;

	};



	memory-controller@2b0a0000 {

		compatible = "arm,pl341", "arm,primecell";

		reg = <0x2b0a0000 0x1000>;

		reg = <0 0x2b0a0000 0 0x1000>;

	};



	wdt@2b060000 {

		compatible = "arm,sp805", "arm,primecell";

		reg = <0x2b060000 0x1000>;

		reg = <0 0x2b060000 0 0x1000>;

		interrupts = <98>;

	};
@@ -72,23 +72,23 @@ 
		#interrupt-cells = <3>;

		#address-cells = <0>;

		interrupt-controller;

		reg = <0x2c001000 0x1000>,

		      <0x2c002000 0x1000>,

		      <0x2c004000 0x2000>,

		      <0x2c006000 0x2000>;

		reg = <0 0x2c001000 0 0x1000>,

		      <0 0x2c002000 0 0x1000>,

		      <0 0x2c004000 0 0x2000>,

		      <0 0x2c006000 0 0x2000>;

		interrupts = <1 9 0xf04>;

	};



	memory-controller@7ffd0000 {

		compatible = "arm,pl354", "arm,primecell";

		reg = <0x7ffd0000 0x1000>;

		reg = <0 0x7ffd0000 0 0x1000>;

		interrupts = <0 86 4>,

			     <0 87 4>;

	};



	dma@7ffb0000 {

		compatible = "arm,pl330", "arm,primecell";

		reg = <0x7ffb0000 0x1000>;

		reg = <0 0x7ffb0000 0 0x1000>;

		interrupts = <0 92 4>,

			     <0 88 4>,

			     <0 89 4>,
@@ -111,12 +111,12 @@ 
	};



	motherboard {

		ranges = <0 0 0x08000000 0x04000000>,

			 <1 0 0x14000000 0x04000000>,

			 <2 0 0x18000000 0x04000000>,

			 <3 0 0x1c000000 0x04000000>,

			 <4 0 0x0c000000 0x04000000>,

			 <5 0 0x10000000 0x04000000>;

		ranges = <0 0 0 0x08000000 0x04000000>,

			 <1 0 0 0x14000000 0x04000000>,

			 <2 0 0 0x18000000 0x04000000>,

			 <3 0 0 0x1c000000 0x04000000>,

			 <4 0 0 0x0c000000 0x04000000>,

			 <5 0 0 0x10000000 0x04000000>;



		interrupt-map-mask = <0 0 63>;

		interrupt-map = <0 0  0 &gic 0  0 4>,

CRA Git | Maintained and supported by SUSTech CRA and CCSE