drm/i915/gt: Tidy repetition in declaring gen8+ interrupts

void gen8_gt_irq_postinstall(struct intel_gt *gt)

{

	struct intel_uncore *uncore = gt->uncore;

	/* These are interrupts we'll toggle with the ring mask register */

	u32 gt_interrupts[] = {

		(GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT |

		 GT_CONTEXT_SWITCH_INTERRUPT << GEN8_RCS_IRQ_SHIFT |

		 GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT |

		 GT_CONTEXT_SWITCH_INTERRUPT << GEN8_BCS_IRQ_SHIFT),

		(GT_RENDER_USER_INTERRUPT << GEN8_VCS0_IRQ_SHIFT |

		 GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VCS0_IRQ_SHIFT |

		 GT_RENDER_USER_INTERRUPT << GEN8_VCS1_IRQ_SHIFT |

		 GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VCS1_IRQ_SHIFT),

	const u32 irqs = GT_RENDER_USER_INTERRUPT | GT_CONTEXT_SWITCH_INTERRUPT;

	const u32 gt_interrupts[] = {

		irqs << GEN8_RCS_IRQ_SHIFT | irqs << GEN8_BCS_IRQ_SHIFT,

		irqs << GEN8_VCS0_IRQ_SHIFT | irqs << GEN8_VCS1_IRQ_SHIFT,

		0,

		(GT_RENDER_USER_INTERRUPT << GEN8_VECS_IRQ_SHIFT |

		 GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VECS_IRQ_SHIFT)

		irqs << GEN8_VECS_IRQ_SHIFT,

	};

	struct intel_uncore *uncore = gt->uncore;

	gt->pm_ier = 0x0;

	gt->pm_imr = ~gt->pm_ier;