arm64: dts: allwinner: a64: Add A64 CSI controller (ff29f13e) · Commits · 戴 / test

Add dts node details for Allwinner A64 CSI controller. A64 CSI has similar features as like in H3, but the CSI_SCLK need to update it to 300MHz than default clock rate. Signed-off-by:

Jagan Teki <jagan@amarulasolutions.com> Acked-by:

Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by:

Maxime Ripard <maxime.ripard@bootlin.com>

arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi

+20 −0

Original line number	Diff line number	Diff line
		@@ -559,6 +559,12 @@
		interrupt-controller;
		#interrupt-cells = <3>;

		csi_pins: csi-pins {
		pins = "PE0", "PE2", "PE3", "PE4", "PE5", "PE6",
		"PE7", "PE8", "PE9", "PE10", "PE11";
		function = "csi";
		};

		i2c0_pins: i2c0_pins {
		pins = "PH0", "PH1";
		function = "i2c0";
		@@ -926,6 +932,20 @@
		status = "disabled";
		};

		csi: csi@1cb0000 {
		compatible = "allwinner,sun50i-a64-csi";
		reg = <0x01cb0000 0x1000>;
		interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&ccu CLK_BUS_CSI>,
		<&ccu CLK_CSI_SCLK>,
		<&ccu CLK_DRAM_CSI>;
		clock-names = "bus", "mod", "ram";
		resets = <&ccu RST_BUS_CSI>;
		pinctrl-names = "default";
		pinctrl-0 = <&csi_pins>;
		status = "disabled";
		};

		hdmi: hdmi@1ee0000 {
		compatible = "allwinner,sun50i-a64-dw-hdmi",
		"allwinner,sun8i-a83t-dw-hdmi";

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