KVM: VMX: remove setting of shadow_base_ptes for EPT (ff1fcb9e) · Commits · 戴 / test

The EPT present/writable bits use the same position as normal pagetable bits. Since direct_map passes ACC_ALL to mmu_set_spte, thus always setting the writable bit on sptes, use the generic PT_PRESENT shadow_base_pte. Also pass present/writable error code information from EPT violation to generic pagefault handler. Signed-off-by:

Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by:

Avi Kivity <avi@redhat.com>

arch/x86/kvm/vmx.c

+1 −3

Original line number	Diff line number	Diff line
		@@ -3476,7 +3476,7 @@ static int handle_ept_violation(struct kvm_vcpu *vcpu)

		gpa = vmcs_read64(GUEST_PHYSICAL_ADDRESS);
		trace_kvm_page_fault(gpa, exit_qualification);
		return kvm_mmu_page_fault(vcpu, gpa & PAGE_MASK, 0);
		return kvm_mmu_page_fault(vcpu, gpa, exit_qualification & 0x3);
		}

		static u64 ept_rsvd_mask(u64 spte, int level)
		@@ -4409,8 +4409,6 @@ static int __init vmx_init(void)

		if (enable_ept) {
		bypass_guest_pf = 0;
		kvm_mmu_set_base_ptes(VMX_EPT_READABLE_MASK \|
		VMX_EPT_WRITABLE_MASK);
		kvm_mmu_set_mask_ptes(0ull, 0ull, 0ull, 0ull,
		VMX_EPT_EXECUTABLE_MASK);
		kvm_enable_tdp();

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