drm/amdgpu: use different irq ring ID for Vega20 page queues (fefdc6cc) · Commits · 戴 / test

Vega20 uses ring id 1 for page queues EOP irq while previous ASICs take ring id 3. Signed-off-by:

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

+4 −2

Original line number	Diff line number	Diff line
		@@ -1706,12 +1706,14 @@ static int sdma_v4_0_process_trap_irq(struct amdgpu_device *adev,
		amdgpu_fence_process(&adev->sdma.instance[instance].ring);
		break;
		case 1:
		/* XXX compute */
		if (adev->asic_type == CHIP_VEGA20)
		amdgpu_fence_process(&adev->sdma.instance[instance].page);
		break;
		case 2:
		/* XXX compute */
		break;
		case 3:
		if (adev->asic_type != CHIP_VEGA20)
		amdgpu_fence_process(&adev->sdma.instance[instance].page);
		break;
		}