Commit fec98069 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 cpu updates from Ingo Molnar:
 "The main changes in this cycle were:

   - Add support for the "Dhyana" x86 CPUs by Hygon: these are licensed
     based on the AMD Zen architecture, and are built and sold in China,
     for domestic datacenter use. The code is pretty close to AMD
     support, mostly with a few quirks and enumeration differences. (Pu
     Wen)

   - Enable CPUID support on Cyrix 6x86/6x86L processors"

* 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  tools/cpupower: Add Hygon Dhyana support
  cpufreq: Add Hygon Dhyana support
  ACPI: Add Hygon Dhyana support
  x86/xen: Add Hygon Dhyana support to Xen
  x86/kvm: Add Hygon Dhyana support to KVM
  x86/mce: Add Hygon Dhyana support to the MCA infrastructure
  x86/bugs: Add Hygon Dhyana to the respective mitigation machinery
  x86/apic: Add Hygon Dhyana support
  x86/pci, x86/amd_nb: Add Hygon Dhyana support to PCI and northbridge
  x86/amd_nb: Check vendor in AMD-only functions
  x86/alternative: Init ideal_nops for Hygon Dhyana
  x86/events: Add Hygon Dhyana support to PMU infrastructure
  x86/smpboot: Do not use BSP INIT delay and MWAIT to idle on Dhyana
  x86/cpu/mtrr: Support TOP_MEM2 and get MTRR number
  x86/cpu: Get cache info and setup cache cpumap for Hygon Dhyana
  x86/cpu: Create Hygon Dhyana architecture support file
  x86/CPU: Change query logic so CPUID is enabled before testing
  x86/CPU: Use correct macros for Cyrix calls
parents 04ce7fae 995d5f64

MAINTAINERS

+6 −0
Original line number Original line Diff line number Diff line
@@ -6787,6 +6787,12 @@ S: Maintained 
F:	mm/memory-failure.c

F:	mm/memory-failure.c

F:	mm/hwpoison-inject.c

F:	mm/hwpoison-inject.c





HYGON PROCESSOR SUPPORT

M:	Pu Wen <puwen@hygon.cn>

L:	linux-kernel@vger.kernel.org

S:	Maintained

F:	arch/x86/kernel/cpu/hygon.c



Hyper-V CORE AND DRIVERS

Hyper-V CORE AND DRIVERS

M:	"K. Y. Srinivasan" <kys@microsoft.com>

M:	"K. Y. Srinivasan" <kys@microsoft.com>

M:	Haiyang Zhang <haiyangz@microsoft.com>

M:	Haiyang Zhang <haiyangz@microsoft.com>

arch/x86/Kconfig.cpu

+14 −0
Original line number Original line Diff line number Diff line
@@ -426,6 +426,20 @@ config CPU_SUP_AMD 




	  If unsure, say N.

	  If unsure, say N.





config CPU_SUP_HYGON

	default y

	bool "Support Hygon processors" if PROCESSOR_SELECT

	select CPU_SUP_AMD

	help

	  This enables detection, tunings and quirks for Hygon processors



	  You need this enabled if you want your kernel to run on an

	  Hygon CPU. Disabling this option on other types of CPUs

	  makes the kernel a tiny bit smaller. Disabling it on an Hygon

	  CPU might render the kernel unbootable.



	  If unsure, say N.



config CPU_SUP_CENTAUR

config CPU_SUP_CENTAUR

	default y

	default y

	bool "Support Centaur processors" if PROCESSOR_SELECT

	bool "Support Centaur processors" if PROCESSOR_SELECT

arch/x86/events/amd/core.c

+4 −0
Original line number Original line Diff line number Diff line
@@ -669,6 +669,10 @@ static int __init amd_core_pmu_init(void) 
		 * We fallback to using default amd_get_event_constraints.

		 * We fallback to using default amd_get_event_constraints.

		 */

		 */

		break;

		break;

	case 0x18:

		pr_cont("Fam18h ");

		/* Using default amd_get_event_constraints. */

		break;

	default:

	default:

		pr_err("core perfctr but no constraints; unknown hardware!\n");

		pr_err("core perfctr but no constraints; unknown hardware!\n");

		return -ENODEV;

		return -ENODEV;

arch/x86/events/amd/uncore.c

+13 −7
Original line number Original line Diff line number Diff line
@@ -515,17 +515,19 @@ static int __init amd_uncore_init(void) 
{

{

	int ret = -ENODEV;

	int ret = -ENODEV;





	if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)

	if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD &&

	    boot_cpu_data.x86_vendor != X86_VENDOR_HYGON)

		return -ENODEV;

		return -ENODEV;





	if (!boot_cpu_has(X86_FEATURE_TOPOEXT))

	if (!boot_cpu_has(X86_FEATURE_TOPOEXT))

		return -ENODEV;

		return -ENODEV;





	if (boot_cpu_data.x86 == 0x17) {

	if (boot_cpu_data.x86 == 0x17 || boot_cpu_data.x86 == 0x18) {

		/*

		/*

		 * For F17h, the Northbridge counters are repurposed as Data

		 * For F17h or F18h, the Northbridge counters are

		 * Fabric counters. Also, L3 counters are supported too. The PMUs

		 * repurposed as Data Fabric counters. Also, L3

		 * are exported based on  family as either L2 or L3 and NB or DF.

		 * counters are supported too. The PMUs are exported

		 * based on family as either L2 or L3 and NB or DF.

		 */

		 */

		num_counters_nb		  = NUM_COUNTERS_NB;

		num_counters_nb		  = NUM_COUNTERS_NB;

		num_counters_llc	  = NUM_COUNTERS_L3;

		num_counters_llc	  = NUM_COUNTERS_L3;
@@ -557,7 +559,9 @@ static int __init amd_uncore_init(void) 
		if (ret)

		if (ret)

			goto fail_nb;

			goto fail_nb;





		pr_info("AMD NB counters detected\n");

		pr_info("%s NB counters detected\n",

			boot_cpu_data.x86_vendor == X86_VENDOR_HYGON ?

				"HYGON" : "AMD");

		ret = 0;

		ret = 0;

	}

	}
@@ -571,7 +575,9 @@ static int __init amd_uncore_init(void) 
		if (ret)

		if (ret)

			goto fail_llc;

			goto fail_llc;





		pr_info("AMD LLC counters detected\n");

		pr_info("%s LLC counters detected\n",

			boot_cpu_data.x86_vendor == X86_VENDOR_HYGON ?

				"HYGON" : "AMD");

		ret = 0;

		ret = 0;

	}

	}

arch/x86/events/core.c

+4 −0
Original line number Original line Diff line number Diff line
@@ -1797,6 +1797,10 @@ static int __init init_hw_perf_events(void) 
	case X86_VENDOR_AMD:

	case X86_VENDOR_AMD:

		err = amd_pmu_init();

		err = amd_pmu_init();

		break;

		break;

	case X86_VENDOR_HYGON:

		err = amd_pmu_init();

		x86_pmu.name = "HYGON";

		break;

	default:

	default:

		err = -ENOTSUPP;

		err = -ENOTSUPP;

	}

	}

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