Commit fea2d7d9 authored by Shubhashree Dhar's avatar Shubhashree Dhar Committed by Rob Clark
Browse files

msm:disp:dpu1: Fix core clk rate in display driver 



Fix max core clk rate during dt parsing in display driver.

Signed-off-by: default avatarShubhashree Dhar <dhar@codeaurora.org>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent b75ab05a

drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.c

+1 −0
Original line number Original line Diff line number Diff line
@@ -175,6 +175,7 @@ int msm_dss_parse_clock(struct platform_device *pdev, 
			continue;

			continue;

		mp->clk_config[i].rate = rate;

		mp->clk_config[i].rate = rate;

		mp->clk_config[i].type = DSS_CLK_PCLK;

		mp->clk_config[i].type = DSS_CLK_PCLK;

		mp->clk_config[i].max_rate = rate;

	}

	}





	mp->num_clk = num_clk;

	mp->num_clk = num_clk;

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