Commit fe38ea56 authored by Ben Dooks's avatar Ben Dooks Committed by Russell King
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[ARM] 3246/1: S3C24XX - retab clock list in arch/arm/mach-s3c2410/clock.c 



Patch from Ben Dooks

Properly tabulate the clock table in arch/arm/mach-s3c2410/clock.c
and put the requisite commas on the end of the structs.

Fix the comment about clock enable and disable in the setup code

Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 9d4ae727

arch/arm/mach-s3c2410/clock.c

+103 −103
Original line number Diff line number Diff line
@@ -253,100 +253,101 @@ struct clk s3c24xx_uclk = { 
/* clock definitions */



static struct clk init_clocks[] = {

	{ .name    = "nand",

	{

		.name		= "nand",

		.id		= -1,

		.parent		= &clk_h,

		.enable		= s3c24xx_clkcon_enable,

	  .ctrlbit = S3C2410_CLKCON_NAND

	},

	{ .name    = "lcd",

		.ctrlbit	= S3C2410_CLKCON_NAND,

	}, {

		.name		= "lcd",

		.id		= -1,

		.parent		= &clk_h,

		.enable		= s3c24xx_clkcon_enable,

	  .ctrlbit = S3C2410_CLKCON_LCDC

	},

	{ .name    = "usb-host",

		.ctrlbit	= S3C2410_CLKCON_LCDC,

	}, {

		.name		= "usb-host",

		.id		= -1,

		.parent		= &clk_h,

		.enable		= s3c24xx_clkcon_enable,

	  .ctrlbit = S3C2410_CLKCON_USBH

	},

	{ .name    = "usb-device",

		.ctrlbit	= S3C2410_CLKCON_USBH,

	}, {

		.name		= "usb-device",

		.id		= -1,

		.parent		= &clk_h,

		.enable		= s3c24xx_clkcon_enable,

	  .ctrlbit = S3C2410_CLKCON_USBD

	},

	{ .name    = "timers",

		.ctrlbit	= S3C2410_CLKCON_USBD,

	}, {

		.name		= "timers",

		.id		= -1,

		.parent		= &clk_p,

		.enable		= s3c24xx_clkcon_enable,

	  .ctrlbit = S3C2410_CLKCON_PWMT

	},

	{ .name    = "sdi",

		.ctrlbit	= S3C2410_CLKCON_PWMT,

	}, {

		.name		= "sdi",

		.id		= -1,

		.parent		= &clk_p,

		.enable		= s3c24xx_clkcon_enable,

	  .ctrlbit = S3C2410_CLKCON_SDI

	},

	{ .name    = "uart",

		.ctrlbit	= S3C2410_CLKCON_SDI,

	}, {

		.name		= "uart",

		.id		= 0,

		.parent		= &clk_p,

		.enable		= s3c24xx_clkcon_enable,

	  .ctrlbit = S3C2410_CLKCON_UART0

	},

	{ .name    = "uart",

		.ctrlbit	= S3C2410_CLKCON_UART0,

	}, {

		.name		= "uart",

		.id		= 1,

		.parent		= &clk_p,

		.enable		= s3c24xx_clkcon_enable,

	  .ctrlbit = S3C2410_CLKCON_UART1

	},

	{ .name    = "uart",

		.ctrlbit	= S3C2410_CLKCON_UART1,

	}, {

		.name		= "uart",

		.id		= 2,

		.parent		= &clk_p,

		.enable		= s3c24xx_clkcon_enable,

	  .ctrlbit = S3C2410_CLKCON_UART2

	},

	{ .name    = "gpio",

		.ctrlbit	= S3C2410_CLKCON_UART2,

	}, {

		.name		= "gpio",

		.id		= -1,

		.parent		= &clk_p,

		.enable		= s3c24xx_clkcon_enable,

	  .ctrlbit = S3C2410_CLKCON_GPIO

	},

	{ .name    = "rtc",

		.ctrlbit	= S3C2410_CLKCON_GPIO,

	}, {

		.name		= "rtc",

		.id		= -1,

		.parent		= &clk_p,

		.enable		= s3c24xx_clkcon_enable,

	  .ctrlbit = S3C2410_CLKCON_RTC

	},

	{ .name    = "adc",

		.ctrlbit	= S3C2410_CLKCON_RTC,

	}, {

		.name		= "adc",

		.id		= -1,

		.parent		= &clk_p,

		.enable		= s3c24xx_clkcon_enable,

	  .ctrlbit = S3C2410_CLKCON_ADC

	},

	{ .name    = "i2c",

		.ctrlbit	= S3C2410_CLKCON_ADC,

	}, {

		.name		= "i2c",

		.id		= -1,

		.parent		= &clk_p,

		.enable		= s3c24xx_clkcon_enable,

	  .ctrlbit = S3C2410_CLKCON_IIC

	},

	{ .name    = "iis",

		.ctrlbit	= S3C2410_CLKCON_IIC,

	}, {

		.name		= "iis",

		.id		= -1,

		.parent		= &clk_p,

		.enable		= s3c24xx_clkcon_enable,

	  .ctrlbit = S3C2410_CLKCON_IIS

	},

	{ .name    = "spi",

		.ctrlbit	= S3C2410_CLKCON_IIS,

	}, {

		.name		= "spi",

		.id		= -1,

		.parent		= &clk_p,

		.enable		= s3c24xx_clkcon_enable,

	  .ctrlbit = S3C2410_CLKCON_SPI

	},

	{ .name    = "watchdog",

		.ctrlbit	= S3C2410_CLKCON_SPI,

	}, {

		.name		= "watchdog",

		.id		= -1,

		.parent		= &clk_p,

	  .ctrlbit = 0

		.ctrlbit	= 0,

	}

};
@@ -390,15 +391,14 @@ int __init s3c24xx_setup_clocks(unsigned long xtal, 
	clk_p.rate = pclk;

	clk_f.rate = fclk;



	/* it looks like just setting the register here is not good

	 * enough, and causes the odd hang at initial boot time, so

	 * do all of them indivdually.

	 *

	 * I think disabling the LCD clock if the LCD is active is

	 * very dangerous, and therefore the bootloader should be

	 * careful to not enable the LCD clock if it is not needed.

	/* We must be careful disabling the clocks we are not intending to

	 * be using at boot time, as subsytems such as the LCD which do

	 * their own DMA requests to the bus can cause the system to lockup

	 * if they where in the middle of requesting bus access.

	 *

	 * and of course, this looks neater

	 * Disabling the LCD clock if the LCD is active is very dangerous,

	 * and therefore the bootloader should be  careful to not enable

	 * the LCD clock if it is not needed.

	*/



	s3c24xx_clk_enable(S3C2410_CLKCON_NAND, 0);

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