Commit fe38bd68 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm 

Pull KVM updates from Paolo Bonzini:
 "s390:
   - ioctl hardening
   - selftests

  ARM:
   - ITS translation cache
   - support for 512 vCPUs
   - various cleanups and bugfixes

  PPC:
   - various minor fixes and preparation

  x86:
   - bugfixes all over the place (posted interrupts, SVM, emulation
     corner cases, blocked INIT)
   - some IPI optimizations"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (75 commits)
  KVM: X86: Use IPI shorthands in kvm guest when support
  KVM: x86: Fix INIT signal handling in various CPU states
  KVM: VMX: Introduce exit reason for receiving INIT signal on guest-mode
  KVM: VMX: Stop the preemption timer during vCPU reset
  KVM: LAPIC: Micro optimize IPI latency
  kvm: Nested KVM MMUs need PAE root too
  KVM: x86: set ctxt->have_exception in x86_decode_insn()
  KVM: x86: always stop emulation on page fault
  KVM: nVMX: trace nested VM-Enter failures detected by H/W
  KVM: nVMX: add tracepoint for failed nested VM-Enter
  x86: KVM: svm: Fix a check in nested_svm_vmrun()
  KVM: x86: Return to userspace with internal error on unexpected exit reason
  KVM: x86: Add kvm_emulate_{rd,wr}msr() to consolidate VXM/SVM code
  KVM: x86: Refactor up kvm_{g,s}et_msr() to simplify callers
  doc: kvm: Fix return description of KVM_SET_MSRS
  KVM: X86: Tune PLE Window tracepoint
  KVM: VMX: Change ple_window type to unsigned int
  KVM: X86: Remove tailing newline for tracepoints
  KVM: X86: Trace vcpu_id for vmexit
  KVM: x86: Manually calculate reserved bits when loading PDPTRS
  ...
parents 404e634f fb3925d0

Documentation/virt/kvm/api.txt

+24 −9
Original line number Diff line number Diff line
@@ -586,7 +586,7 @@ Capability: basic 
Architectures: x86

Type: vcpu ioctl

Parameters: struct kvm_msrs (in)

Returns: 0 on success, -1 on error

Returns: number of msrs successfully set (see below), -1 on error



Writes model-specific registers to the vcpu.  See KVM_GET_MSRS for the

data structures.
@@ -595,6 +595,11 @@ Application code should set the 'nmsrs' member (which indicates the 
size of the entries array), and the 'index' and 'data' members of each

array entry.



It tries to set the MSRs in array entries[] one by one. If setting an MSR

fails, e.g., due to setting reserved bits, the MSR isn't supported/emulated

by KVM, etc..., it stops processing the MSR list and returns the number of

MSRs that have been set successfully.





4.20 KVM_SET_CPUID
@@ -753,8 +758,8 @@ in-kernel irqchip (GIC), and for in-kernel irqchip can tell the GIC to 
use PPIs designated for specific cpus.  The irq field is interpreted

like this:



  bits:  | 31 ... 24 | 23  ... 16 | 15    ...    0 |

  field: | irq_type  | vcpu_index |     irq_id     |

  bits:  |  31 ... 28  | 27 ... 24 | 23  ... 16 | 15 ... 0 |

  field: | vcpu2_index | irq_type  | vcpu_index |  irq_id  |



The irq_type field has the following values:

- irq_type[0]: out-of-kernel GIC: irq_id 0 is IRQ, irq_id 1 is FIQ
@@ -766,6 +771,14 @@ The irq_type field has the following values: 


In both cases, level is used to assert/deassert the line.



When KVM_CAP_ARM_IRQ_LINE_LAYOUT_2 is supported, the target vcpu is

identified as (256 * vcpu2_index + vcpu_index). Otherwise, vcpu2_index

must be zero.



Note that on arm/arm64, the KVM_CAP_IRQCHIP capability only conditions

injection of interrupts for the in-kernel irqchip. KVM_IRQ_LINE can always

be used for a userspace interrupt controller.



struct kvm_irq_level {

	union {

		__u32 irq;     /* GSI */
@@ -3079,12 +3092,14 @@ This exception is also raised directly at the corresponding VCPU if the 
flag KVM_S390_MEMOP_F_INJECT_EXCEPTION is set in the "flags" field.



The start address of the memory region has to be specified in the "gaddr"

field, and the length of the region in the "size" field. "buf" is the buffer

supplied by the userspace application where the read data should be written

to for KVM_S390_MEMOP_LOGICAL_READ, or where the data that should be written

is stored for a KVM_S390_MEMOP_LOGICAL_WRITE. "buf" is unused and can be NULL

when KVM_S390_MEMOP_F_CHECK_ONLY is specified. "ar" designates the access

register number to be used.

field, and the length of the region in the "size" field (which must not

be 0). The maximum value for "size" can be obtained by checking the

KVM_CAP_S390_MEM_OP capability. "buf" is the buffer supplied by the

userspace application where the read data should be written to for

KVM_S390_MEMOP_LOGICAL_READ, or where the data that should be written is

stored for a KVM_S390_MEMOP_LOGICAL_WRITE. When KVM_S390_MEMOP_F_CHECK_ONLY

is specified, "buf" is unused and can be NULL. "ar" designates the access

register number to be used; the valid range is 0..15.



The "reserved" field is meant for future extensions. It is not used by

KVM with the currently defined set of flags.

Documentation/virt/kvm/mmu.txt

+2 −2
Original line number Diff line number Diff line
@@ -294,7 +294,7 @@ Handling a page fault is performed as follows: 
   - walk shadow page table

   - check for valid generation number in the spte (see "Fast invalidation of

     MMIO sptes" below)

   - cache the information to vcpu->arch.mmio_gva, vcpu->arch.access and

   - cache the information to vcpu->arch.mmio_gva, vcpu->arch.mmio_access and

     vcpu->arch.mmio_gfn, and call the emulator

 - If both P bit and R/W bit of error code are set, this could possibly

   be handled as a "fast page fault" (fixed without taking the MMU lock).  See
@@ -304,7 +304,7 @@ Handling a page fault is performed as follows: 
   - if permissions are insufficient, reflect the fault back to the guest

 - determine the host page

   - if this is an mmio request, there is no host page; cache the info to

     vcpu->arch.mmio_gva, vcpu->arch.access and vcpu->arch.mmio_gfn

     vcpu->arch.mmio_gva, vcpu->arch.mmio_access and vcpu->arch.mmio_gfn

 - walk the shadow page table to find the spte for the translation,

   instantiating missing intermediate page tables as necessary

   - If this is an mmio request, cache the mmio info to the spte and set some

arch/arm/include/uapi/asm/kvm.h

+3 −1
Original line number Diff line number Diff line
@@ -266,8 +266,10 @@ struct kvm_vcpu_events { 
#define   KVM_DEV_ARM_ITS_CTRL_RESET		4



/* KVM_IRQ_LINE irq field index values */

#define KVM_ARM_IRQ_VCPU2_SHIFT		28

#define KVM_ARM_IRQ_VCPU2_MASK		0xf

#define KVM_ARM_IRQ_TYPE_SHIFT		24

#define KVM_ARM_IRQ_TYPE_MASK		0xff

#define KVM_ARM_IRQ_TYPE_MASK		0xf

#define KVM_ARM_IRQ_VCPU_SHIFT		16

#define KVM_ARM_IRQ_VCPU_MASK		0xff

#define KVM_ARM_IRQ_NUM_SHIFT		0

arch/arm64/include/asm/pgtable-prot.h

+1 −1
Original line number Diff line number Diff line
@@ -77,7 +77,7 @@ 
	})



#define PAGE_S2			__pgprot(_PROT_DEFAULT | PAGE_S2_MEMATTR(NORMAL) | PTE_S2_RDONLY | PAGE_S2_XN)

#define PAGE_S2_DEVICE		__pgprot(_PROT_DEFAULT | PAGE_S2_MEMATTR(DEVICE_nGnRE) | PTE_S2_RDONLY | PAGE_S2_XN)

#define PAGE_S2_DEVICE		__pgprot(_PROT_DEFAULT | PAGE_S2_MEMATTR(DEVICE_nGnRE) | PTE_S2_RDONLY | PTE_S2_XN)



#define PAGE_NONE		__pgprot(((_PAGE_DEFAULT) & ~PTE_VALID) | PTE_PROT_NONE | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN)

#define PAGE_SHARED		__pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_WRITE)

arch/arm64/include/uapi/asm/kvm.h

+3 −1
Original line number Diff line number Diff line
@@ -325,8 +325,10 @@ struct kvm_vcpu_events { 
#define   KVM_ARM_VCPU_TIMER_IRQ_PTIMER		1



/* KVM_IRQ_LINE irq field index values */

#define KVM_ARM_IRQ_VCPU2_SHIFT		28

#define KVM_ARM_IRQ_VCPU2_MASK		0xf

#define KVM_ARM_IRQ_TYPE_SHIFT		24

#define KVM_ARM_IRQ_TYPE_MASK		0xff

#define KVM_ARM_IRQ_TYPE_MASK		0xf

#define KVM_ARM_IRQ_VCPU_SHIFT		16

#define KVM_ARM_IRQ_VCPU_MASK		0xff

#define KVM_ARM_IRQ_NUM_SHIFT		0

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