Commit fe27f167 authored Feb 09, 2018 by Tony Lindgren

ARM: OMAP2+: Fix sar_base inititalization for HS omaps



HS omaps use irq_save_secure_context() instead of irq_save_context()
so sar_base will never get initialized and irq_sar_clear() gets called
with a wrong address for HS omaps from irq_restore_context().

Starting with commit f4b9f40a ("ARM: OMAP4+: Initialize SAR RAM
base early for proper CPU1 reset for kexec") we have it available,
and this ideally would been fixed with that commit already.

Fixes: f4b9f40a ("ARM: OMAP4+: Initialize SAR RAM base early for
proper CPU1 reset for kexec")
Cc: Andrew F. Davis <afd@ti.com>
Cc: Dave Gerlach <d-gerlach@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Santosh Shilimkar <ssantosh@kernel.org>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

parent d3be6d2a

arch/arm/mach-omap2/omap-wakeupgen.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -299,8 +299,6 @@ static void irq_save_context(void)
		if (soc_is_dra7xx())
		return;

		if (!sar_base)
		sar_base = omap4_get_sar_ram_base();
		if (wakeupgen_ops && wakeupgen_ops->save_context)
		wakeupgen_ops->save_context();
		}
		@@ -598,6 +596,8 @@ static int __init wakeupgen_init(struct device_node *node,
		irq_hotplug_init();
		irq_pm_init();

		sar_base = omap4_get_sar_ram_base();

		return 0;
		}
		IRQCHIP_DECLARE(ti_wakeupgen, "ti,omap4-wugen-mpu", wakeupgen_init);

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