Commit fe1f4fc1 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'net-hns3-add-three-optimizations-for-mailbox-handling' 



Huazhong Tan says:

====================
net: hns3: add three optimizations for mailbox handling

This patchset includes three code optimizations for mailbox handling.

[patch 1] adds a response code conversion.
[patch 2] refactors some structure definitions about PF and
VF mailbox.
[patch 3] refactors the condition whether PF responds VF's mailbox.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 09984483 bb5790b7

drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h

+46 −8
Original line number Diff line number Diff line
@@ -7,8 +7,6 @@ 
#include <linux/mutex.h>

#include <linux/types.h>



#define HCLGE_MBX_VF_MSG_DATA_NUM	16



enum HCLGE_MBX_OPCODE {

	HCLGE_MBX_RESET = 0x01,		/* (VF -> PF) assert reset */

	HCLGE_MBX_ASSERTING_RESET,	/* (PF -> VF) PF is asserting reset*/
@@ -72,10 +70,15 @@ enum hclge_mbx_vlan_cfg_subcode { 
	HCLGE_MBX_GET_PORT_BASE_VLAN_STATE,	/* get port based vlan state */

};



#define HCLGE_MBX_MAX_MSG_SIZE	16

#define HCLGE_MBX_MAX_MSG_SIZE	14

#define HCLGE_MBX_MAX_RESP_DATA_SIZE	8U

#define HCLGE_MBX_RING_MAP_BASIC_MSG_NUM	3

#define HCLGE_MBX_RING_NODE_VARIABLE_NUM	3

#define HCLGE_MBX_MAX_RING_CHAIN_PARAM_NUM	4



struct hclge_ring_chain_param {

	u8 ring_type;

	u8 tqp_index;

	u8 int_gl_index;

};



struct hclgevf_mbx_resp_status {

	struct mutex mbx_mutex; /* protects against contending sync cmd resp */
@@ -85,6 +88,41 @@ struct hclgevf_mbx_resp_status { 
	u8 additional_info[HCLGE_MBX_MAX_RESP_DATA_SIZE];

};



struct hclge_respond_to_vf_msg {

	int status;

	u8 data[HCLGE_MBX_MAX_RESP_DATA_SIZE];

	u16 len;

};



struct hclge_vf_to_pf_msg {

	u8 code;

	union {

		struct {

			u8 subcode;

			u8 data[HCLGE_MBX_MAX_MSG_SIZE];

		};

		struct {

			u8 en_bc;

			u8 en_uc;

			u8 en_mc;

		};

		struct {

			u8 vector_id;

			u8 ring_num;

			struct hclge_ring_chain_param

				param[HCLGE_MBX_MAX_RING_CHAIN_PARAM_NUM];

		};

	};

};



struct hclge_pf_to_vf_msg {

	u16 code;

	u16 vf_mbx_msg_code;

	u16 vf_mbx_msg_subcode;

	u16 resp_status;

	u8 resp_data[HCLGE_MBX_MAX_RESP_DATA_SIZE];

};



struct hclge_mbx_vf_to_pf_cmd {

	u8 rsv;

	u8 mbx_src_vfid; /* Auto filled by IMP */
@@ -92,17 +130,17 @@ struct hclge_mbx_vf_to_pf_cmd { 
	u8 rsv1[1];

	u8 msg_len;

	u8 rsv2[3];

	u8 msg[HCLGE_MBX_MAX_MSG_SIZE];

	struct hclge_vf_to_pf_msg msg;

};



#define HCLGE_MBX_NEED_RESP_BIT		BIT(0)

#define HCLGE_MBX_NEED_RESP_B		0



struct hclge_mbx_pf_to_vf_cmd {

	u8 dest_vfid;

	u8 rsv[3];

	u8 msg_len;

	u8 rsv1[3];

	u16 msg[8];

	struct hclge_pf_to_vf_msg msg;

};



struct hclge_vf_rst_cmd {

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c

+175 −212

File changed.

Preview size limit exceeded, changes collapsed.

drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c

+170 −141

File changed.

Preview size limit exceeded, changes collapsed.

drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h

+2 −2
Original line number Diff line number Diff line
@@ -305,8 +305,8 @@ static inline bool hclgevf_is_reset_pending(struct hclgevf_dev *hdev) 
	return !!hdev->reset_pending;

}



int hclgevf_send_mbx_msg(struct hclgevf_dev *hdev, u16 code, u16 subcode,

			 const u8 *msg_data, u8 msg_len, bool need_resp,

int hclgevf_send_mbx_msg(struct hclgevf_dev *hdev,

			 struct hclge_vf_to_pf_msg *send_msg, bool need_resp,

			 u8 *resp_data, u16 resp_len);

void hclgevf_mbx_handler(struct hclgevf_dev *hdev);

void hclgevf_mbx_async_handler(struct hclgevf_dev *hdev);

drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_mbx.c

+27 −23
Original line number Diff line number Diff line
@@ -5,6 +5,11 @@ 
#include "hclgevf_main.h"

#include "hnae3.h"



static int hclgevf_resp_to_errno(u16 resp_code)

{

	return resp_code ? -resp_code : 0;

}



static void hclgevf_reset_mbx_resp_status(struct hclgevf_dev *hdev)

{

	/* this function should be called with mbx_resp.mbx_mutex held
@@ -79,8 +84,8 @@ static int hclgevf_get_mbx_resp(struct hclgevf_dev *hdev, u16 code0, u16 code1, 
	return 0;

}



int hclgevf_send_mbx_msg(struct hclgevf_dev *hdev, u16 code, u16 subcode,

			 const u8 *msg_data, u8 msg_len, bool need_resp,

int hclgevf_send_mbx_msg(struct hclgevf_dev *hdev,

			 struct hclge_vf_to_pf_msg *send_msg, bool need_resp,

			 u8 *resp_data, u16 resp_len)

{

	struct hclge_mbx_vf_to_pf_cmd *req;
@@ -89,21 +94,17 @@ int hclgevf_send_mbx_msg(struct hclgevf_dev *hdev, u16 code, u16 subcode, 


	req = (struct hclge_mbx_vf_to_pf_cmd *)desc.data;



	/* first two bytes are reserved for code & subcode */

	if (msg_len > (HCLGE_MBX_MAX_MSG_SIZE - 2)) {

	if (!send_msg) {

		dev_err(&hdev->pdev->dev,

			"VF send mbx msg fail, msg len %d exceeds max len %d\n",

			msg_len, HCLGE_MBX_MAX_MSG_SIZE);

			"failed to send mbx, msg is NULL\n");

		return -EINVAL;

	}



	hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_MBX_VF_TO_PF, false);

	req->mbx_need_resp |= need_resp ? HCLGE_MBX_NEED_RESP_BIT :

					  ~HCLGE_MBX_NEED_RESP_BIT;

	req->msg[0] = code;

	req->msg[1] = subcode;

	if (msg_data)

		memcpy(&req->msg[2], msg_data, msg_len);

	if (need_resp)

		hnae3_set_bit(req->mbx_need_resp, HCLGE_MBX_NEED_RESP_B, 1);



	memcpy(&req->msg, send_msg, sizeof(struct hclge_vf_to_pf_msg));



	/* synchronous send */

	if (need_resp) {
@@ -118,7 +119,8 @@ int hclgevf_send_mbx_msg(struct hclgevf_dev *hdev, u16 code, u16 subcode, 
			return status;

		}



		status = hclgevf_get_mbx_resp(hdev, code, subcode, resp_data,

		status = hclgevf_get_mbx_resp(hdev, send_msg->code,

					      send_msg->subcode, resp_data,

					      resp_len);

		mutex_unlock(&hdev->mbx_resp.mbx_mutex);

	} else {
@@ -169,7 +171,7 @@ void hclgevf_mbx_handler(struct hclgevf_dev *hdev) 
		if (unlikely(!hnae3_get_bit(flag, HCLGEVF_CMDQ_RX_OUTVLD_B))) {

			dev_warn(&hdev->pdev->dev,

				 "dropped invalid mailbox message, code = %u\n",

				 req->msg[0]);

				 req->msg.code);



			/* dropping/not processing this invalid message */

			crq->desc[crq->next_to_use].flag = 0;
@@ -183,19 +185,21 @@ void hclgevf_mbx_handler(struct hclgevf_dev *hdev) 
		 * timeout and simultaneously queue the async messages for later

		 * prcessing in context of mailbox task i.e. the slow path.

		 */

		switch (req->msg[0]) {

		switch (req->msg.code) {

		case HCLGE_MBX_PF_VF_RESP:

			if (resp->received_resp)

				dev_warn(&hdev->pdev->dev,

					 "VF mbx resp flag not clear(%u)\n",

					 req->msg[1]);

					 req->msg.vf_mbx_msg_code);

			resp->received_resp = true;



			resp->origin_mbx_msg = (req->msg[1] << 16);

			resp->origin_mbx_msg |= req->msg[2];

			resp->resp_status = req->msg[3];

			resp->origin_mbx_msg =

					(req->msg.vf_mbx_msg_code << 16);

			resp->origin_mbx_msg |= req->msg.vf_mbx_msg_subcode;

			resp->resp_status =

				hclgevf_resp_to_errno(req->msg.resp_status);



			temp = (u8 *)&req->msg[4];

			temp = (u8 *)req->msg.resp_data;

			for (i = 0; i < HCLGE_MBX_MAX_RESP_DATA_SIZE; i++) {

				resp->additional_info[i] = *temp;

				temp++;
@@ -220,13 +224,13 @@ void hclgevf_mbx_handler(struct hclgevf_dev *hdev) 
			    HCLGE_MBX_MAX_ARQ_MSG_NUM) {

				dev_warn(&hdev->pdev->dev,

					 "Async Q full, dropping msg(%u)\n",

					 req->msg[1]);

					 req->msg.code);

				break;

			}



			/* tail the async message in arq */

			msg_q = hdev->arq.msg_q[hdev->arq.tail];

			memcpy(&msg_q[0], req->msg,

			memcpy(&msg_q[0], &req->msg,

			       HCLGE_MBX_MAX_ARQ_MSG_SIZE * sizeof(u16));

			hclge_mbx_tail_ptr_move_arq(hdev->arq);

			atomic_inc(&hdev->arq.count);
@@ -237,7 +241,7 @@ void hclgevf_mbx_handler(struct hclgevf_dev *hdev) 
		default:

			dev_err(&hdev->pdev->dev,

				"VF received unsupported(%u) mbx msg from PF\n",

				req->msg[0]);

				req->msg.code);

			break;

		}

		crq->desc[crq->next_to_use].flag = 0;

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