Commit fdf8ec0a authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by Simon Horman
Browse files

ARM: dts: r8a7792: add SYS-DMAC support 



Describe SYS-DMAC0/1 in the R8A7792 device tree.

Signed-off-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 7c4163aa

arch/arm/boot/dts/r8a7792.dtsi

+64 −0
Original line number Diff line number Diff line
@@ -79,6 +79,70 @@ 
			#power-domain-cells = <1>;

		};



		dmac0: dma-controller@e6700000 {

			compatible = "renesas,dmac-r8a7792",

				     "renesas,rcar-dmac";

			reg = <0 0xe6700000 0 0x20000>;

			interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "error",

					  "ch0", "ch1", "ch2", "ch3",

					  "ch4", "ch5", "ch6", "ch7",

					  "ch8", "ch9", "ch10", "ch11",

					  "ch12", "ch13", "ch14";

			clocks = <&mstp2_clks R8A7792_CLK_SYS_DMAC0>;

			clock-names = "fck";

			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;

			#dma-cells = <1>;

			dma-channels = <15>;

		};



		dmac1: dma-controller@e6720000 {

			compatible = "renesas,dmac-r8a7792",

				     "renesas,rcar-dmac";

			reg = <0 0xe6720000 0 0x20000>;

			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "error",

					  "ch0", "ch1", "ch2", "ch3",

					  "ch4", "ch5", "ch6", "ch7",

					  "ch8", "ch9", "ch10", "ch11",

					  "ch12", "ch13", "ch14";

			clocks = <&mstp2_clks R8A7792_CLK_SYS_DMAC1>;

			clock-names = "fck";

			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;

			#dma-cells = <1>;

			dma-channels = <15>;

		};



		/* Special CPG clocks */

		cpg_clocks: cpg_clocks@e6150000 {

			compatible = "renesas,r8a7792-cpg-clocks",

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