Commit fdc9b019 authored by Stephen Boyd's avatar Stephen Boyd
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Merge tag 'renesas-clk-for-v5.11-tag3' of...

Merge tag 'renesas-clk-for-v5.11-tag3' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas

Pull Renesas clk driver updates from Geert Uytterhoeven:

 - Update git repo branch for Renesas clock drivers
 - Add camera (CSI) and video-in (VIN) clocks on R-Car V3U
 - Add RPC (QSPI/HyperFLASH) clocks on RZ/G2M, RZ/G2N, and RZ/G2E
 - Stop using __raw_*() I/O accessors
 - One more conversion of DT bindings to json-schema
 - Minor fixes and improvements

* tag 'renesas-clk-for-v5.11-tag3' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
  dt-bindings: clock: renesas: rcar-usb2-clock-sel: Convert bindings to json-schema
  clk: renesas: sh73a0: Stop using __raw_*() I/O accessors
  clk: renesas: r8a774c0: Add RPC clocks
  clk: renesas: r8a779a0: Fix R and OSC clocks
  clk: renesas: cpg-mssr: fix kerneldoc of cpg_mssr_priv
  clk: renesas: rcar-usb2-clock-sel: Replace devm_reset_control_array_get()
  clk: renesas: r8a774b1: Add RPC clocks
  clk: renesas: r8a774a1: Add RPC clocks
  clk: renesas: r8a779a0: Add VIN clocks
  clk: renesas: r8a779a0: Add CSI4[0-3] clocks
  MAINTAINERS: Update git repo for Renesas clock drivers
  clk: renesas: r8a779a0: Make rcar_r8a779a0_cpg_clk_register() static
  clk: renesas: rcar-gen3: Remove stp_ck handling for SDHI
parents 3650b228 f5c50b1f
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* Renesas R-Car USB 2.0 clock selector

This file provides information on what the device node for the R-Car USB 2.0
clock selector.

If you connect an external clock to the USB_EXTAL pin only, you should set
the clock rate to "usb_extal" node only.
If you connect an oscillator to both the USB_XTAL and USB_EXTAL, this module
is not needed because this is default setting. (Of course, you can set the
clock rates to both "usb_extal" and "usb_xtal" nodes.

Case 1: An external clock connects to R-Car SoC
	+----------+   +--- R-Car ---------------------+
	|External  |---|USB_EXTAL ---> all usb channels|
	|clock     |   |USB_XTAL                       |
	+----------+   +-------------------------------+
In this case, we need this driver with "usb_extal" clock.

Case 2: An oscillator connects to R-Car SoC
	+----------+   +--- R-Car ---------------------+
	|Oscillator|---|USB_EXTAL -+-> all usb channels|
	|          |---|USB_XTAL --+                   |
	+----------+   +-------------------------------+
In this case, we don't need this selector.

Required properties:
- compatible: "renesas,r8a7795-rcar-usb2-clock-sel" if the device is a part of
	      an R8A7795 SoC.
	      "renesas,r8a7796-rcar-usb2-clock-sel" if the device if a part of
	      an R8A77960 SoC.
	      "renesas,r8a77961-rcar-usb2-clock-sel" if the device if a part of
	      an R8A77961 SoC.
	      "renesas,rcar-gen3-usb2-clock-sel" for a generic R-Car Gen3
	      compatible device.

	      When compatible with the generic version, nodes must list the
	      SoC-specific version corresponding to the platform first
	      followed by the generic version.

- reg: offset and length of the USB 2.0 clock selector register block.
- clocks: A list of phandles and specifier pairs.
- clock-names: Name of the clocks.
 - The functional clock of USB 2.0 host side must be "ehci_ohci"
 - The functional clock of HS-USB side must be "hs-usb-if"
 - The USB_EXTAL clock pin must be "usb_extal"
 - The USB_XTAL clock pin must be "usb_xtal"
- #clock-cells: Must be 0
- power-domains: A phandle and symbolic PM domain specifier.
                 See power/renesas,rcar-sysc.yaml.
- resets: A list of phandles and specifier pairs.
- reset-names: Name of the resets.
 - The reset of USB 2.0 host side must be "ehci_ohci"
 - The reset of HS-USB side must be "hs-usb-if"

Example (R-Car H3):

	usb2_clksel: clock-controller@e6590630 {
		compatible = "renesas,r8a7795-rcar-usb2-clock-sel",
			     "renesas,rcar-gen3-usb2-clock-sel";
		reg = <0 0xe6590630 0 0x02>;
		clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>,
			 <&usb_extal>, <&usb_xtal>;
		clock-names = "ehci_ohci", "hs-usb-if", "usb_extal", "usb_xtal";
		#clock-cells = <0>;
		power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
		resets = <&cpg 703>, <&cpg 704>;
		reset-names = "ehci_ohci", "hs-usb-if";
	};
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/clock/renesas,rcar-usb2-clock-sel.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"

title: Renesas R-Car USB 2.0 clock selector

maintainers:
  - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

description: |
  If you connect an external clock to the USB_EXTAL pin only, you should set
  the clock rate to "usb_extal" node only.
  If you connect an oscillator to both the USB_XTAL and USB_EXTAL, this module
  is not needed because this is default setting. (Of course, you can set the
  clock rates to both "usb_extal" and "usb_xtal" nodes.

  Case 1: An external clock connects to R-Car SoC
    +----------+   +--- R-Car ---------------------+
    |External  |---|USB_EXTAL ---> all usb channels|
    |clock     |   |USB_XTAL                       |
    +----------+   +-------------------------------+

  In this case, we need this driver with "usb_extal" clock.

  Case 2: An oscillator connects to R-Car SoC
    +----------+   +--- R-Car ---------------------+
    |Oscillator|---|USB_EXTAL -+-> all usb channels|
    |          |---|USB_XTAL --+                   |
    +----------+   +-------------------------------+
  In this case, we don't need this selector.

properties:
  compatible:
    items:
      - enum:
          - renesas,r8a7795-rcar-usb2-clock-sel  # R-Car H3
          - renesas,r8a7796-rcar-usb2-clock-sel  # R-Car M3-W
          - renesas,r8a77961-rcar-usb2-clock-sel # R-Car M3-W+
      - const: renesas,rcar-gen3-usb2-clock-sel

  reg:
    maxItems: 1

  clocks:
    minItems: 4
    maxItems: 4

  clock-names:
    items:
      - const: ehci_ohci
      - const: hs-usb-if
      - const: usb_extal
      - const: usb_xtal

  '#clock-cells':
    const: 0

  power-domains:
    maxItems: 1

  resets:
    minItems: 2
    maxItems: 2

  reset-names:
    items:
      - const: ehci_ohci
      - const: hs-usb-if

required:
  - compatible
  - reg
  - clocks
  - clock-names
  - '#clock-cells'
  - power-domains
  - resets
  - reset-names

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
    #include <dt-bindings/power/r8a7795-sysc.h>

    usb2_clksel: clock-controller@e6590630 {
        compatible = "renesas,r8a7795-rcar-usb2-clock-sel",
                     "renesas,rcar-gen3-usb2-clock-sel";
        reg = <0xe6590630 0x02>;
        clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>,
                 <&usb_extal>, <&usb_xtal>;
        clock-names = "ehci_ohci", "hs-usb-if", "usb_extal", "usb_xtal";
        #clock-cells = <0>;
        power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
        resets = <&cpg 703>, <&cpg 704>;
        reset-names = "ehci_ohci", "hs-usb-if";
    };
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@@ -14888,7 +14888,7 @@ RENESAS CLOCK DRIVERS
M:	Geert Uytterhoeven <geert+renesas@glider.be>
L:	linux-renesas-soc@vger.kernel.org
S:	Supported
T:	git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git clk-renesas
T:	git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git renesas-clk
F:	Documentation/devicetree/bindings/clock/renesas,*
F:	drivers/clk/renesas/
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@@ -121,7 +121,7 @@ sh73a0_cpg_register_clock(struct device_node *np, struct sh73a0_cpg *cpg,
			(phy_no ? CPG_DSI1PHYCR : CPG_DSI0PHYCR);

		parent_name = phy_no ? "dsi1pck" : "dsi0pck";
		mult = __raw_readl(dsi_reg);
		mult = readl(dsi_reg);
		if (!(mult & 0x8000))
			mult = 1;
		else
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@@ -41,6 +41,7 @@ enum clk_ids {
	CLK_S2,
	CLK_S3,
	CLK_SDSRC,
	CLK_RPCSRC,
	CLK_RINT,

	/* Module Clocks */
@@ -67,6 +68,12 @@ static const struct cpg_core_clk r8a774a1_core_clks[] __initconst = {
	DEF_FIXED(".s2",        CLK_S2,            CLK_PLL1_DIV2,  4, 1),
	DEF_FIXED(".s3",        CLK_S3,            CLK_PLL1_DIV2,  6, 1),
	DEF_FIXED(".sdsrc",     CLK_SDSRC,         CLK_PLL1_DIV2,  2, 1),
	DEF_BASE(".rpcsrc",     CLK_RPCSRC, CLK_TYPE_GEN3_RPCSRC, CLK_PLL1),

	DEF_BASE("rpc",         R8A774A1_CLK_RPC, CLK_TYPE_GEN3_RPC,
		 CLK_RPCSRC),
	DEF_BASE("rpcd2",       R8A774A1_CLK_RPCD2, CLK_TYPE_GEN3_RPCD2,
		 R8A774A1_CLK_RPC),

	DEF_GEN3_OSC(".r",      CLK_RINT,          CLK_EXTAL,      32),

@@ -200,6 +207,7 @@ static const struct mssr_mod_clk r8a774a1_mod_clks[] __initconst = {
	DEF_MOD("can-fd",		 914,	R8A774A1_CLK_S3D2),
	DEF_MOD("can-if1",		 915,	R8A774A1_CLK_S3D4),
	DEF_MOD("can-if0",		 916,	R8A774A1_CLK_S3D4),
	DEF_MOD("rpc-if",		 917,	R8A774A1_CLK_RPCD2),
	DEF_MOD("i2c6",			 918,	R8A774A1_CLK_S0D6),
	DEF_MOD("i2c5",			 919,	R8A774A1_CLK_S0D6),
	DEF_MOD("i2c-dvfs",		 926,	R8A774A1_CLK_CP),
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