Commit fd521d3b authored by Matthew Auld's avatar Matthew Auld Committed by Chris Wilson
Browse files

drm/i915: include GTT page-size info in error state 



It might prove useful in the future to know if the vma is utilising
huge-GTT-pages. Related to this is the GTT cache, where there is some HW
"quirkiness" where it must be disabled if using 2M pages, so include
that for good measure.

Suggested-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarMatthew Auld <matthew.auld@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190909171646.22090-1-matthew.auld@intel.com
parent 33dd8899

drivers/gpu/drm/i915/gem/i915_gem_object_types.h

+0 −1
Original line number Diff line number Diff line
@@ -160,7 +160,6 @@ struct drm_i915_gem_object { 
		struct sg_table *pages;

		void *mapping;



		/* TODO: whack some of this into the error state */

		struct i915_page_sizes {

			/**

			 * The sg mask of the pages sg_table. i.e the mask of

drivers/gpu/drm/i915/i915_gpu_error.c

+10 −0
Original line number Diff line number Diff line
@@ -575,6 +575,9 @@ static void print_error_obj(struct drm_i915_error_state_buf *m, 
			   lower_32_bits(obj->gtt_offset));

	}



	if (obj->gtt_page_sizes > I915_GTT_PAGE_SIZE_4K)

		err_printf(m, "gtt_page_sizes = 0x%08x\n", obj->gtt_page_sizes);



	err_compression_marker(m);

	for (page = 0; page < obj->page_count; page++) {

		int i, len;
@@ -735,6 +738,9 @@ static void __err_print_to_sgl(struct drm_i915_error_state_buf *m, 
	if (IS_GEN(m->i915, 7))

		err_printf(m, "ERR_INT: 0x%08x\n", error->err_int);



	if (IS_GEN_RANGE(m->i915, 8, 11))

		err_printf(m, "GTT_CACHE_EN: 0x%08x\n", error->gtt_cache);



	for (ee = error->engine; ee; ee = ee->next)

		error_print_engine(m, ee, error->epoch);
@@ -985,6 +991,7 @@ i915_error_object_create(struct drm_i915_private *i915, 


	dst->gtt_offset = vma->node.start;

	dst->gtt_size = vma->node.size;

	dst->gtt_page_sizes = vma->page_sizes.gtt;

	dst->num_pages = num_pages;

	dst->page_count = 0;

	dst->unused = 0;
@@ -1554,6 +1561,9 @@ static void capture_reg_state(struct i915_gpu_state *error) 
		error->gac_eco = intel_uncore_read(uncore, GAC_ECO_BITS);

	}



	if (IS_GEN_RANGE(i915, 8, 11))

		error->gtt_cache = intel_uncore_read(uncore, HSW_GTT_CACHE_EN);



	/* 4: Everything else */

	if (INTEL_GEN(i915) >= 11) {

		error->ier = intel_uncore_read(uncore, GEN8_DE_MISC_IER);

drivers/gpu/drm/i915/i915_gpu_error.h

+2 −0
Original line number Diff line number Diff line
@@ -74,6 +74,7 @@ struct i915_gpu_state { 
	u32 gam_ecochk;

	u32 gab_ctl;

	u32 gfx_mode;

	u32 gtt_cache;



	u32 nfence;

	u64 fence[I915_MAX_NUM_FENCES];
@@ -127,6 +128,7 @@ struct i915_gpu_state { 
		struct drm_i915_error_object {

			u64 gtt_offset;

			u64 gtt_size;

			u32 gtt_page_sizes;

			int num_pages;

			int page_count;

			int unused;

CRA Git | Maintained and supported by SUSTech CRA and CCSE