Commit fce566ff authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'v4.10-rockchip-dts64-1' of... 

Merge tag 'v4.10-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64

64bit devicetree changes including the px5 evaluation board
a fix for wrong i2c registers on rk3368 a new nvmem cell and
power-domain on rk3399 as well as moving mmc frequency
properties to the more generic max-frequency one.

* tag 'v4.10-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip

:
  arm64: dts: rockchip: replace to "max-frequency" instead of "clock-freq-min-max"
  arm64: dts: rockchip: add cpu-id nvmem cell node for rk3399
  arm64: dts: rockchip: add sdmmc support for px5-evb
  arm64: dts: rockchip: Add more properties for emmc on px5-evb
  arm64: dts: rockchip: Add PX5 Evaluation board
  arm64: dts: rockchip: add powerdomain for typec on rk3399
  arm64: dts: rockchip: fix i2c resource error of rk3368

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents aeb961be c4959069

Documentation/devicetree/bindings/arm/rockchip.txt

+8 −0
Original line number Diff line number Diff line
@@ -99,6 +99,14 @@ Rockchip platforms device tree bindings 
    Required root node properties:

      - compatible = "mqmaker,miqi", "rockchip,rk3288";



- Rockchip PX3 Evaluation board:

    Required root node properties:

      - compatible = "rockchip,px3-evb", "rockchip,px3", "rockchip,rk3188";



- Rockchip PX5 Evaluation board:

    Required root node properties:

      - compatible = "rockchip,px5-evb", "rockchip,px5", "rockchip,rk3368";



- Rockchip RK3368 evb:

    Required root node properties:

      - compatible = "rockchip,rk3368-evb-act8846", "rockchip,rk3368";

arch/arm64/boot/dts/rockchip/Makefile

+1 −0
Original line number Diff line number Diff line 
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-orion-r68-meta.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-px5-evb.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb

arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts

+1 −1
Original line number Diff line number Diff line
@@ -344,7 +344,7 @@ 
&sdmmc {

	bus-width = <4>;

	clock-frequency = <50000000>;

	clock-freq-min-max = <400000 50000000>;

	max-frequency = <50000000>;

	cap-sd-highspeed;

	card-detect-delay = <200>;

	num-slots = <1>;

arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts

0 → 100644
+314 −0
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd

 *

 * This file is dual-licensed: you can use it either under the terms

 * of the GPL or the X11 license, at your option. Note that this dual

 * licensing only applies to this file, and not this project as a

 * whole.

 *

 *  a) This file is free software; you can redistribute it and/or

 *     modify it under the terms of the GNU General Public License as

 *     published by the Free Software Foundation; either version 2 of the

 *     License, or (at your option) any later version.

 *

 *     This file is distributed in the hope that it will be useful,

 *     but WITHOUT ANY WARRANTY; without even the implied warranty of

 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 *     GNU General Public License for more details.

 *

 * Or, alternatively,

 *

 *  b) Permission is hereby granted, free of charge, to any person

 *     obtaining a copy of this software and associated documentation

 *     files (the "Software"), to deal in the Software without

 *     restriction, including without limitation the rights to use,

 *     copy, modify, merge, publish, distribute, sublicense, and/or

 *     sell copies of the Software, and to permit persons to whom the

 *     Software is furnished to do so, subject to the following

 *     conditions:

 *

 *     The above copyright notice and this permission notice shall be

 *     included in all copies or substantial portions of the Software.

 *

 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,

 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES

 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND

 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT

 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,

 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 *     OTHER DEALINGS IN THE SOFTWARE.

 */



/dts-v1/;

#include "rk3368.dtsi"

#include <dt-bindings/input/input.h>



/ {

	model = "Rockchip PX5 EVB";

	compatible = "rockchip,px5-evb", "rockchip,px5", "rockchip,rk3368";



	chosen {

		stdout-path = "serial4:115200n8";

	};



	memory@0 {

		reg = <0x0 0x0 0x0 0x80000000>;

		device_type = "memory";

	};



	keys: gpio-keys {

		compatible = "gpio-keys";

		pinctrl-names = "default";

		pinctrl-0 = <&pwr_key>;



		power {

			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;

			label = "GPIO Power";

			linux,code = <KEY_POWER>;

			wakeup-source;

		};

	};



	vcc_sys: vcc-sys-regulator {

		compatible = "regulator-fixed";

		regulator-name = "vcc_sys";

		regulator-min-microvolt = <5000000>;

		regulator-max-microvolt = <5000000>;

		regulator-always-on;

		regulator-boot-on;

	};

};



&emmc {

	status = "okay";

	bus-width = <8>;

	cap-mmc-highspeed;

	clock-frequency = <150000000>;

	disable-wp;

	keep-power-in-suspend;

	mmc-hs200-1_8v;

	no-sdio;

	no-sd;

	non-removable;

	num-slots = <1>;

	pinctrl-names = "default";

	pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>;

	vmmc-supply = <&vcc_io>;

	vqmmc-supply = <&vcc18_flash>;

};



&i2c0 {

	status = "okay";



	rk808: pmic@1b {

		compatible = "rockchip,rk808";

		reg = <0x1b>;

		interrupt-parent = <&gpio0>;

		interrupts = <5 IRQ_TYPE_LEVEL_LOW>;

		pinctrl-names = "default";

		pinctrl-0 = <&pmic_int>, <&pmic_sleep>;

		rockchip,system-power-controller;

		vcc1-supply = <&vcc_sys>;

		vcc2-supply = <&vcc_sys>;

		vcc3-supply = <&vcc_sys>;

		vcc4-supply = <&vcc_sys>;

		vcc6-supply = <&vcc_sys>;

		vcc7-supply = <&vcc_sys>;

		vcc8-supply = <&vcc_io>;

		vcc9-supply = <&vcc_sys>;

		vcc10-supply = <&vcc_sys>;

		vcc11-supply = <&vcc_sys>;

		vcc12-supply = <&vcc_io>;

		clock-output-names = "xin32k", "rk808-clkout2";

		#clock-cells = <1>;



		regulators {

			vdd_cpu: DCDC_REG1 {

				regulator-always-on;

				regulator-boot-on;

				regulator-min-microvolt = <700000>;

				regulator-max-microvolt = <1500000>;

				regulator-name = "vdd_cpu";

			};



			vdd_log: DCDC_REG2 {

				regulator-always-on;

				regulator-boot-on;

				regulator-min-microvolt = <700000>;

				regulator-max-microvolt = <1500000>;

				regulator-name = "vdd_log";

			};



			vcc_ddr: DCDC_REG3 {

				regulator-always-on;

				regulator-boot-on;

				regulator-name = "vcc_ddr";

			};



			vcc_io: DCDC_REG4 {

				regulator-always-on;

				regulator-boot-on;

				regulator-min-microvolt = <3300000>;

				regulator-max-microvolt = <3300000>;

				regulator-name = "vcc_io";

			};



			vcc18_flash: LDO_REG1 {

				regulator-always-on;

				regulator-boot-on;

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <1800000>;

				regulator-name = "vcc18_flash";

			};



			vcca_33: LDO_REG2 {

				regulator-always-on;

				regulator-boot-on;

				regulator-min-microvolt = <3300000>;

				regulator-max-microvolt = <3300000>;

				regulator-name = "vcca_33";

			};



			vdd_10: LDO_REG3 {

				regulator-always-on;

				regulator-boot-on;

				regulator-min-microvolt = <1000000>;

				regulator-max-microvolt = <1000000>;

				regulator-name = "vdd_10";

			};



			avdd_33: LDO_REG4 {

				regulator-min-microvolt = <3300000>;

				regulator-max-microvolt = <3300000>;

				regulator-name = "avdd_33";

			};



			vccio_sd: LDO_REG5 {

				regulator-always-on;

				regulator-boot-on;

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <3300000>;

				regulator-name = "vccio_sd";

			};



			vdd10_lcd: LDO_REG6 {

				regulator-always-on;

				regulator-boot-on;

				regulator-min-microvolt = <1000000>;

				regulator-max-microvolt = <1000000>;

				regulator-name = "vdd10_lcd";

			};



			vcc_18: LDO_REG7 {

				regulator-always-on;

				regulator-boot-on;

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <1800000>;

				regulator-name = "vcc_18";

			};



			vcc18_lcd: LDO_REG8 {

				regulator-always-on;

				regulator-boot-on;

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <1800000>;

				regulator-name = "vcc18_lcd";

			};



			vcc_sd: SWITCH_REG1 {

				regulator-name = "vcc_sd";

			};



			vcc33_lcd: SWITCH_REG2 {

				regulator-always-on;

				regulator-boot-on;

				regulator-name = "vcc33_lcd";

			};

		};

	};

};



&i2c1 {

	status = "okay";



	accelerometer@18 {

		compatible = "bosch,bma250";

		reg = <0x18>;

		interrupt-parent = <&gpio2>;

		interrupts = <17 IRQ_TYPE_LEVEL_LOW>;

	};

};



&i2c2 {

	status = "okay";



	gsl1680: touchscreen@40 {

		compatible = "silead,gsl1680";

		reg = <0x40>;

		interrupt-parent = <&gpio3>;

		interrupts = <28 IRQ_TYPE_EDGE_FALLING>;

		power-gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;

		touchscreen-size-x = <800>;

		touchscreen-size-y = <1280>;

		silead,max-fingers = <5>;

	};

};



&pinctrl {

	keys {

		pwr_key: pwr-key {

			rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_none>;

		};

	};



	pmic {

		pmic_sleep: pmic-sleep {

			rockchip,pins = <0 0 RK_FUNC_2 &pcfg_pull_none>;

		};



		pmic_int: pmic-int {

			rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;

		};

	};

};



&sdmmc {

	status = "okay";

	bus-width = <4>;

	cap-mmc-highspeed;

	cap-sd-highspeed;

	card-detect-delay = <200>;

	no-emmc;

	no-sdio;

	num-slots = <1>;

	sd-uhs-sdr12;

	sd-uhs-sdr25;

	pinctrl-names = "default";

	pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_bus4>, <&sdmmc_cd>;

	rockchip,default-sample-phase = <90>;

	vmmc-supply = <&vcc_sd>;

	vqmmc-supply = <&vccio_sd>;

};



&tsadc {

	status = "okay";

	rockchip,hw-tshut-mode = <0>; /* CRU */

	rockchip,hw-tshut-polarity = <1>; /* high */

};



&uart4 {

	status = "okay";

};



&usb_host0_ehci {

	status = "okay";

};



&usb_otg {

	status = "okay";

};



&wdt {

	status = "okay";

};

arch/arm64/boot/dts/rockchip/rk3368.dtsi

+9 −9
Original line number Diff line number Diff line
@@ -231,7 +231,7 @@ 
	sdmmc: dwmmc@ff0c0000 {

		compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";

		reg = <0x0 0xff0c0000 0x0 0x4000>;

		clock-freq-min-max = <400000 150000000>;

		max-frequency = <150000000>;

		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,

			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;

		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
@@ -243,7 +243,7 @@ 
	sdio0: dwmmc@ff0d0000 {

		compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";

		reg = <0x0 0xff0d0000 0x0 0x4000>;

		clock-freq-min-max = <400000 150000000>;

		max-frequency = <150000000>;

		clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>,

			 <&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>;

		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
@@ -255,7 +255,7 @@ 
	emmc: dwmmc@ff0f0000 {

		compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";

		reg = <0x0 0xff0f0000 0x0 0x4000>;

		clock-freq-min-max = <400000 150000000>;

		max-frequency = <150000000>;

		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,

			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;

		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
@@ -315,16 +315,16 @@ 
		status = "disabled";

	};



	i2c1: i2c@ff140000 {

	i2c2: i2c@ff140000 {

		compatible = "rockchip,rk3368-i2c", "rockchip,rk3288-i2c";

		reg = <0x0 0xff140000 0x0 0x1000>;

		interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;

		#address-cells = <1>;

		#size-cells = <0>;

		clock-names = "i2c";

		clocks = <&cru PCLK_I2C1>;

		clocks = <&cru PCLK_I2C2>;

		pinctrl-names = "default";

		pinctrl-0 = <&i2c1_xfer>;

		pinctrl-0 = <&i2c2_xfer>;

		status = "disabled";

	};
@@ -554,16 +554,16 @@ 
		status = "disabled";

	};



	i2c2: i2c@ff660000 {

	i2c1: i2c@ff660000 {

		compatible = "rockchip,rk3368-i2c", "rockchip,rk3288-i2c";

		reg = <0x0 0xff660000 0x0 0x1000>;

		interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;

		#address-cells = <1>;

		#size-cells = <0>;

		clock-names = "i2c";

		clocks = <&cru PCLK_I2C2>;

		clocks = <&cru PCLK_I2C1>;

		pinctrl-names = "default";

		pinctrl-0 = <&i2c2_xfer>;

		pinctrl-0 = <&i2c1_xfer>;

		status = "disabled";

	};

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