Commit fc2478e7 authored by Kumar Gala's avatar Kumar Gala
Browse files

powerpc/85xx: Rework PCI nodes on P1020RDB



* Move SoC specific details like irq mapping to SoC dtsi
* Update interrupt property to cover both error interrupt and PCIe
  runtime interrupts

Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent 1e6a9d04
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+2 −24
Original line number Diff line number Diff line
@@ -257,19 +257,8 @@
	pci0: pcie@ffe09000 {
		ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
			  0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
		interrupt-map = <
			/* IDSEL 0x0 */
			0000 0x0 0x0 0x1 &mpic 0x4 0x1
			0000 0x0 0x0 0x2 &mpic 0x5 0x1
			0000 0x0 0x0 0x3 &mpic 0x6 0x1
			0000 0x0 0x0 0x4 &mpic 0x7 0x1
			>;
		reg = <0 0xffe09000 0 0x1000>;
		pcie@0 {
			reg = <0x0 0x0 0x0 0x0 0x0>;
			#size-cells = <2>;
			#address-cells = <3>;
			device_type = "pci";
			ranges = <0x2000000 0x0 0xa0000000
				  0x2000000 0x0 0xa0000000
				  0x0 0x20000000
@@ -281,21 +270,10 @@
	};

	pci1: pcie@ffe0a000 {
		reg = <0 0xffe0a000 0 0x1000>;
		ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
			  0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
		interrupt-map = <
			/* IDSEL 0x0 */
			0000 0x0 0x0 0x1 &mpic 0x0 0x1
			0000 0x0 0x0 0x2 &mpic 0x1 0x1
			0000 0x0 0x0 0x3 &mpic 0x2 0x1
			0000 0x0 0x0 0x4 &mpic 0x3 0x1
			>;
		pcie@0 {
			reg = <0x0 0x0 0x0 0x0 0x0>;
			#size-cells = <2>;
			#address-cells = <3>;
			device_type = "pci";
			ranges = <0x2000000 0x0 0x80000000
				  0x2000000 0x0 0x80000000
				  0x0 0x20000000
+36 −4
Original line number Diff line number Diff line
@@ -352,26 +352,58 @@
	pci0: pcie@ffe09000 {
		compatible = "fsl,mpc8548-pcie";
		device_type = "pci";
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		reg = <0 0xffe09000 0 0x1000>;
		bus-range = <0 255>;
		clock-frequency = <33333333>;
		interrupt-parent = <&mpic>;
		interrupts = <16 2>;

		pcie@0 {
			reg = <0 0 0 0 0>;
			#interrupt-cells = <1>;
			#size-cells = <2>;
			#address-cells = <3>;
			device_type = "pci";
			interrupts = <16 2>;
			interrupt-map-mask = <0xf800 0 0 7>;
			interrupt-map = <
				/* IDSEL 0x0 */
				0000 0x0 0x0 0x1 &mpic 0x4 0x1
				0000 0x0 0x0 0x2 &mpic 0x5 0x1
				0000 0x0 0x0 0x3 &mpic 0x6 0x1
				0000 0x0 0x0 0x4 &mpic 0x7 0x1
				>;
		};

	};

	pci1: pcie@ffe0a000 {
		compatible = "fsl,mpc8548-pcie";
		device_type = "pci";
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		reg = <0 0xffe0a000 0 0x1000>;
		bus-range = <0 255>;
		clock-frequency = <33333333>;
		interrupt-parent = <&mpic>;
		interrupts = <16 2>;

		pcie@0 {
			reg = <0 0 0 0 0>;
			#interrupt-cells = <1>;
			#size-cells = <2>;
			#address-cells = <3>;
			device_type = "pci";
			interrupts = <16 2>;
			interrupt-map-mask = <0xf800 0 0 7>;

			interrupt-map = <
				/* IDSEL 0x0 */
				0000 0x0 0x0 0x1 &mpic 0x0 0x1
				0000 0x0 0x0 0x2 &mpic 0x1 0x1
				0000 0x0 0x0 0x3 &mpic 0x2 0x1
				0000 0x0 0x0 0x4 &mpic 0x3 0x1
				>;
		};
	};
};