Commit fc1caf6e authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6 

* 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (204 commits)
  agp: intel-agp: do not use PCI resources before pci_enable_device()
  agp: efficeon-agp: do not use PCI resources before pci_enable_device()
  drm: kill BKL from common code
  drm/kms: Simplify setup of the initial I2C encoder config.
  drm,io-mapping: Specify slot to use for atomic mappings
  drm/radeon/kms: only expose underscan on avivo chips
  drm/radeon: add new pci ids
  drm: Cleanup after failing to create master->unique and dev->name
  drm/radeon: tone down overchatty acpi debug messages.
  drm/radeon/kms: enable underscan option for digital connectors
  drm/radeon/kms: fix calculation of h/v scaling factors
  drm/radeon/kms/igp: sideport is AMD only
  drm/radeon/kms: handle the case of no active displays properly in the bandwidth code
  drm: move ttm global code to core drm
  drm/i915: Clear the Ironlake dithering flags when the pipe doesn't want it.
  drm/radeon/kms: make sure HPD is set to NONE on analog-only connectors
  drm/radeon/kms: make sure rio_mem is valid before unmapping it
  drm/agp/i915: trim stolen space to 32M
  drm/i915: Unset cursor if out-of-bounds upon mode change (v4)
  drm/i915: Unreference object not handle on creation
  ...
parents 9779714c 96576a9e

drivers/char/agp/efficeon-agp.c

+11 −11
Original line number Diff line number Diff line
@@ -372,29 +372,29 @@ static int __devinit agp_efficeon_probe(struct pci_dev *pdev, 
	bridge->capndx = cap_ptr;



	/*

	* The following fixes the case where the BIOS has "forgotten" to

	* provide an address range for the GART.

	* If the device has not been properly setup, the following will catch

	* the problem and should stop the system from crashing.

	* 20030610 - hamish@zot.org

	*/

	r = &pdev->resource[0];

	if (!r->start && r->end) {

		if (pci_assign_resource(pdev, 0)) {

			printk(KERN_ERR PFX "could not assign resource 0\n");

	if (pci_enable_device(pdev)) {

		printk(KERN_ERR PFX "Unable to Enable PCI device\n");

		agp_put_bridge(bridge);

		return -ENODEV;

	}

	}



	/*

	* If the device has not been properly setup, the following will catch

	* the problem and should stop the system from crashing.

	* The following fixes the case where the BIOS has "forgotten" to

	* provide an address range for the GART.

	* 20030610 - hamish@zot.org

	*/

	if (pci_enable_device(pdev)) {

		printk(KERN_ERR PFX "Unable to Enable PCI device\n");

	r = &pdev->resource[0];

	if (!r->start && r->end) {

		if (pci_assign_resource(pdev, 0)) {

			printk(KERN_ERR PFX "could not assign resource 0\n");

			agp_put_bridge(bridge);

			return -ENODEV;

		}

	}



	/* Fill in the mode register */

	if (cap_ptr) {

drivers/char/agp/intel-agp.c

+13 −13
Original line number Diff line number Diff line
@@ -816,9 +816,9 @@ static const struct intel_driver_description { 
	{ PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB, PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG,

	    "HD Graphics", NULL, &intel_i965_driver },

	{ PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB, PCI_DEVICE_ID_INTEL_SANDYBRIDGE_IG,

	    "Sandybridge", NULL, &intel_i965_driver },

	    "Sandybridge", NULL, &intel_gen6_driver },

	{ PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB, PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_IG,

	    "Sandybridge", NULL, &intel_i965_driver },

	    "Sandybridge", NULL, &intel_gen6_driver },

	{ 0, 0, NULL, NULL, NULL }

};
@@ -908,29 +908,29 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev, 
	dev_info(&pdev->dev, "Intel %s Chipset\n", intel_agp_chipsets[i].name);



	/*

	* The following fixes the case where the BIOS has "forgotten" to

	* provide an address range for the GART.

	* If the device has not been properly setup, the following will catch

	* the problem and should stop the system from crashing.

	* 20030610 - hamish@zot.org

	*/

	r = &pdev->resource[0];

	if (!r->start && r->end) {

		if (pci_assign_resource(pdev, 0)) {

			dev_err(&pdev->dev, "can't assign resource 0\n");

	if (pci_enable_device(pdev)) {

		dev_err(&pdev->dev, "can't enable PCI device\n");

		agp_put_bridge(bridge);

		return -ENODEV;

	}

	}



	/*

	* If the device has not been properly setup, the following will catch

	* the problem and should stop the system from crashing.

	* The following fixes the case where the BIOS has "forgotten" to

	* provide an address range for the GART.

	* 20030610 - hamish@zot.org

	*/

	if (pci_enable_device(pdev)) {

		dev_err(&pdev->dev, "can't enable PCI device\n");

	r = &pdev->resource[0];

	if (!r->start && r->end) {

		if (pci_assign_resource(pdev, 0)) {

			dev_err(&pdev->dev, "can't assign resource 0\n");

			agp_put_bridge(bridge);

			return -ENODEV;

		}

	}



	/* Fill in the mode register */

	if (cap_ptr) {

drivers/char/agp/intel-agp.h

+6 −0
Original line number Diff line number Diff line
@@ -60,6 +60,12 @@ 
#define I810_PTE_LOCAL		0x00000002

#define I810_PTE_VALID		0x00000001

#define I830_PTE_SYSTEM_CACHED  0x00000006

/* GT PTE cache control fields */

#define GEN6_PTE_UNCACHED	0x00000002

#define GEN6_PTE_LLC		0x00000004

#define GEN6_PTE_LLC_MLC	0x00000006

#define GEN6_PTE_GFDT		0x00000008



#define I810_SMRAM_MISCC	0x70

#define I810_GFX_MEM_WIN_SIZE	0x00010000

#define I810_GFX_MEM_WIN_32M	0x00010000

drivers/char/agp/intel-gtt.c

+76 −7
Original line number Diff line number Diff line
@@ -25,6 +25,10 @@ 
#define USE_PCI_DMA_API 1

#endif



/* Max amount of stolen space, anything above will be returned to Linux */

int intel_max_stolen = 32 * 1024 * 1024;

EXPORT_SYMBOL(intel_max_stolen);



static const struct aper_size_info_fixed intel_i810_sizes[] =

{

	{64, 16384, 4},
@@ -104,7 +108,7 @@ static int intel_agp_map_memory(struct agp_memory *mem) 
	DBG("try mapping %lu pages\n", (unsigned long)mem->page_count);



	if (sg_alloc_table(&st, mem->page_count, GFP_KERNEL))

		return -ENOMEM;

		goto err;



	mem->sg_list = sg = st.sgl;
@@ -113,11 +117,14 @@ static int intel_agp_map_memory(struct agp_memory *mem) 


	mem->num_sg = pci_map_sg(intel_private.pcidev, mem->sg_list,

				 mem->page_count, PCI_DMA_BIDIRECTIONAL);

	if (unlikely(!mem->num_sg)) {

		intel_agp_free_sglist(mem);

		return -ENOMEM;

	}

	if (unlikely(!mem->num_sg))

		goto err;



	return 0;



err:

	sg_free_table(&st);

	return -ENOMEM;

}



static void intel_agp_unmap_memory(struct agp_memory *mem)
@@ -176,7 +183,7 @@ static void intel_agp_insert_sg_entries(struct agp_memory *mem, 
	if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB ||

	    agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB)

	{

		cache_bits = I830_PTE_SYSTEM_CACHED;

		cache_bits = GEN6_PTE_LLC_MLC;

	}



	for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
@@ -710,7 +717,12 @@ static void intel_i830_init_gtt_entries(void) 
			break;

		}

	}

	if (gtt_entries > 0) {

	if (!local && gtt_entries > intel_max_stolen) {

		dev_info(&agp_bridge->dev->dev,

			 "detected %dK stolen memory, trimming to %dK\n",

			 gtt_entries / KB(1), intel_max_stolen / KB(1));

		gtt_entries = intel_max_stolen / KB(4);

	} else if (gtt_entries > 0) {

		dev_info(&agp_bridge->dev->dev, "detected %dK %s memory\n",

		       gtt_entries / KB(1), local ? "local" : "stolen");

		gtt_entries /= KB(4);
@@ -797,6 +809,10 @@ static int intel_i830_create_gatt_table(struct agp_bridge_data *bridge) 


	/* we have to call this as early as possible after the MMIO base address is known */

	intel_i830_init_gtt_entries();

	if (intel_private.gtt_entries == 0) {

		iounmap(intel_private.registers);

		return -ENOMEM;

	}



	agp_bridge->gatt_table = NULL;
@@ -1282,6 +1298,11 @@ static int intel_i915_create_gatt_table(struct agp_bridge_data *bridge) 


	/* we have to call this as early as possible after the MMIO base address is known */

	intel_i830_init_gtt_entries();

	if (intel_private.gtt_entries == 0) {

		iounmap(intel_private.gtt);

		iounmap(intel_private.registers);

		return -ENOMEM;

	}



	agp_bridge->gatt_table = NULL;
@@ -1309,6 +1330,16 @@ static unsigned long intel_i965_mask_memory(struct agp_bridge_data *bridge, 
	return addr | bridge->driver->masks[type].mask;

}



static unsigned long intel_gen6_mask_memory(struct agp_bridge_data *bridge,

					    dma_addr_t addr, int type)

{

	/* Shift high bits down */

	addr |= (addr >> 28) & 0xff;



	/* Type checking must be done elsewhere */

	return addr | bridge->driver->masks[type].mask;

}



static void intel_i965_get_gtt_range(int *gtt_offset, int *gtt_size)

{

	u16 snb_gmch_ctl;
@@ -1390,6 +1421,11 @@ static int intel_i965_create_gatt_table(struct agp_bridge_data *bridge) 


	/* we have to call this as early as possible after the MMIO base address is known */

	intel_i830_init_gtt_entries();

	if (intel_private.gtt_entries == 0) {

		iounmap(intel_private.gtt);

		iounmap(intel_private.registers);

		return -ENOMEM;

	}



	agp_bridge->gatt_table = NULL;
@@ -1517,6 +1553,39 @@ static const struct agp_bridge_driver intel_i965_driver = { 
#endif

};



static const struct agp_bridge_driver intel_gen6_driver = {

	.owner			= THIS_MODULE,

	.aperture_sizes		= intel_i830_sizes,

	.size_type		= FIXED_APER_SIZE,

	.num_aperture_sizes	= 4,

	.needs_scratch_page	= true,

	.configure		= intel_i9xx_configure,

	.fetch_size		= intel_i9xx_fetch_size,

	.cleanup		= intel_i915_cleanup,

	.mask_memory		= intel_gen6_mask_memory,

	.masks			= intel_i810_masks,

	.agp_enable		= intel_i810_agp_enable,

	.cache_flush		= global_cache_flush,

	.create_gatt_table	= intel_i965_create_gatt_table,

	.free_gatt_table	= intel_i830_free_gatt_table,

	.insert_memory		= intel_i915_insert_entries,

	.remove_memory		= intel_i915_remove_entries,

	.alloc_by_type		= intel_i830_alloc_by_type,

	.free_by_type		= intel_i810_free_by_type,

	.agp_alloc_page		= agp_generic_alloc_page,

	.agp_alloc_pages        = agp_generic_alloc_pages,

	.agp_destroy_page	= agp_generic_destroy_page,

	.agp_destroy_pages      = agp_generic_destroy_pages,

	.agp_type_to_mask_type	= intel_i830_type_to_mask_type,

	.chipset_flush		= intel_i915_chipset_flush,

#ifdef USE_PCI_DMA_API

	.agp_map_page		= intel_agp_map_page,

	.agp_unmap_page		= intel_agp_unmap_page,

	.agp_map_memory		= intel_agp_map_memory,

	.agp_unmap_memory	= intel_agp_unmap_memory,

#endif

};



static const struct agp_bridge_driver intel_g33_driver = {

	.owner			= THIS_MODULE,

	.aperture_sizes		= intel_i830_sizes,

drivers/gpu/drm/Kconfig

+6 −5
Original line number Diff line number Diff line
@@ -6,7 +6,7 @@ 
#

menuconfig DRM

	tristate "Direct Rendering Manager (XFree86 4.1.0 and higher DRI support)"

	depends on (AGP || AGP=n) && PCI && !EMULATED_CMPXCHG && MMU

	depends on (AGP || AGP=n) && !EMULATED_CMPXCHG && MMU

	select I2C

	select I2C_ALGOBIT

	select SLOW_WORK
@@ -17,7 +17,7 @@ menuconfig DRM 
	  These modules provide support for synchronization, security, and

	  DMA transfers. Please see <http://dri.sourceforge.net/> for more

	  details.  You should also select and configure AGP

	  (/dev/agpgart) support.

	  (/dev/agpgart) support if it is available for your platform.



config DRM_KMS_HELPER

	tristate
@@ -61,6 +61,7 @@ config DRM_RADEON 
        select DRM_KMS_HELPER

        select DRM_TTM

	select POWER_SUPPLY

	select HWMON

	help

	  Choose this option if you have an ATI Radeon graphics card.  There

	  are both PCI and AGP versions.  You don't need to choose this to
@@ -130,7 +131,7 @@ endchoice 


config DRM_MGA

	tristate "Matrox g200/g400"

	depends on DRM

	depends on DRM && PCI

	select FW_LOADER

	help

	  Choose this option if you have a Matrox G200, G400 or G450 graphics
@@ -148,14 +149,14 @@ config DRM_SIS 


config DRM_VIA

	tristate "Via unichrome video cards"

	depends on DRM

	depends on DRM && PCI

	help

	  Choose this option if you have a Via unichrome or compatible video

	  chipset. If M is selected the module will be called via.



config DRM_SAVAGE

	tristate "Savage video cards"

	depends on DRM

	depends on DRM && PCI

	help

	  Choose this option if you have a Savage3D/4/SuperSavage/Pro/Twister

	  chipset. If M is selected the module will be called savage.

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