Commit fbdcdb9c authored by Biju Das's avatar Biju Das Committed by Geert Uytterhoeven
Browse files

arm64: dts: renesas: hihope-common: Move du clk properties out of common dtsi 



RZ/G2N board is pin compatible with RZ/G2M board. However on the SoC
side RZ/G2N uses DU3 where as RZ/G2M uses DU2 for the DPAD. In order to
reuse the common dtsi for both the boards, it is required to move du clock
properties from common dtsi to board specific dts.

Signed-off-by: default avatarBiju Das <biju.das@bp.renesas.com>
Reviewed-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/1570029619-43238-2-git-send-email-biju.das@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 79718f9d

arch/arm64/boot/dts/renesas/hihope-common.dtsi

+0 −8
Original line number Diff line number Diff line
@@ -142,14 +142,6 @@ 
};



&du {

	clocks = <&cpg CPG_MOD 724>,

		 <&cpg CPG_MOD 723>,

		 <&cpg CPG_MOD 722>,

		 <&versaclock5 1>,

		 <&x302_clk>,

		 <&versaclock5 2>;

	clock-names = "du.0", "du.1", "du.2",

		      "dclkin.0", "dclkin.1", "dclkin.2";

	status = "okay";

};

arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m.dts

+11 −0
Original line number Diff line number Diff line
@@ -24,3 +24,14 @@ 
		reg = <0x6 0x00000000 0x0 0x80000000>;

	};

};



&du {

	clocks = <&cpg CPG_MOD 724>,

		 <&cpg CPG_MOD 723>,

		 <&cpg CPG_MOD 722>,

		 <&versaclock5 1>,

		 <&x302_clk>,

		 <&versaclock5 2>;

	clock-names = "du.0", "du.1", "du.2",

		      "dclkin.0", "dclkin.1", "dclkin.2";

};

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