Commit fbd918a2 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'for-3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata 

Pull libata updates from Tejun Heo:
 "Support for some new embedded controllers.

  A couple late (<= a week) fixes have stable cc'd and one patch ("SATA:
  MV: Add support for the optional PHYs") got committed yesterday
  because otherwise the resulting kernel would fail boot on an embedded
  board due to interdependent changes in its platform tree.

  Other than that, nothing too noteworthy"

* 'for-3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata:
  SATA: MV: Add support for the optional PHYs
  sata-highbank: Remove unnecessary ahci_platform.h include
  libata: disable LPM for some WD SATA-I devices
  ARM: mvebu: update the SATA compatible string for Armada 370/XP
  ata: sata_mv: fix disk hotplug for Armada 370/XP SoCs
  ata: sata_mv: introduce compatible string "marvell, armada-370-sata"
  ata: pata_samsung_cf: Remove unused macros
  ata: pata_samsung_cf: Use devm_ioremap_resource()
  ata: pata_samsung_cf: Merge pata_samsung_cf.h into pata_samsung_cf.c
  ata: pata_samsung_cf: Move plat/regs-ata.h to drivers/ata
  drivers: ata: Mark the function as static in libahci.c
  drivers: ata: Mark the function ahci_init_interrupts() as static in ahci.c
  ahci: imx: fix the error handling in imx_ahci_probe()
  ahci: imx: ahci_imx_softreset() can be static
  ahci: imx: Add i.MX53 support
  ahci: imx: Pull out the clock enable/disable calls
  libata, dt: Document sata_rcar bindings
  sata_rcar: Add R-Car Gen2 SATA PHY support
  ahci: mcp89: enter AHCI mode under Apple BIOS emulation
  ata: libata-eh: Remove unnecessary snprintf arithmetic
parents f075e0f6 b7db4f2e

Documentation/devicetree/bindings/ata/marvell.txt

+1 −1
Original line number Diff line number Diff line 
* Marvell Orion SATA



Required Properties:

- compatibility : "marvell,orion-sata"

- compatibility : "marvell,orion-sata" or "marvell,armada-370-sata"

- reg           : Address range of controller

- interrupts    : Interrupt controller is using

- nr-ports      : Number of SATA ports in use.

Documentation/devicetree/bindings/ata/sata_rcar.txt

0 → 100644
+18 −0
Original line number Diff line number Diff line 
* Renesas R-Car SATA



Required properties:

- compatible		: should contain one of the following:

			  - "renesas,sata-r8a7779" for R-Car H1

			  - "renesas,sata-r8a7790" for R-Car H2

			  - "renesas,sata-r8a7791" for R-Car M2

- reg			: address and length of the SATA registers;

- interrupts		: must consist of one interrupt specifier.



Example:



sata: sata@fc600000 {

	compatible = "renesas,sata-r8a7779";

	reg = <0xfc600000 0x2000>;

	interrupt-parent = <&gic>;

	interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;

};

arch/arm/boot/dts/armada-370-xp.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -152,7 +152,7 @@ 
			};



			sata@a0000 {

				compatible = "marvell,orion-sata";

				compatible = "marvell,armada-370-sata";

				reg = <0xa0000 0x5000>;

				interrupts = <55>;

				clocks = <&gateclk 15>, <&gateclk 30>;

arch/arm/plat-samsung/include/plat/regs-ata.h

deleted100644 → 0
+0 −56
Original line number Diff line number Diff line 
/* linux/arch/arm/plat-samsung/include/plat/regs-ata.h

 *

 * Copyright (c) 2010 Samsung Electronics Co., Ltd.

 *		http://www.samsung.com

 *

 * Samsung CF-ATA register definitions

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

*/



#ifndef __ASM_PLAT_REGS_ATA_H

#define __ASM_PLAT_REGS_ATA_H __FILE__



#define S3C_CFATA_REG(x)	(x)



#define S3C_CFATA_MUX		S3C_CFATA_REG(0x0)



#define S3C_ATA_CTRL		S3C_CFATA_REG(0x0)

#define S3C_ATA_STATUS		S3C_CFATA_REG(0x4)

#define S3C_ATA_CMD		S3C_CFATA_REG(0x8)

#define S3C_ATA_SWRST		S3C_CFATA_REG(0xc)

#define S3C_ATA_IRQ		S3C_CFATA_REG(0x10)

#define S3C_ATA_IRQ_MSK		S3C_CFATA_REG(0x14)

#define S3C_ATA_CFG		S3C_CFATA_REG(0x18)



#define S3C_ATA_MDMA_TIME	S3C_CFATA_REG(0x28)

#define S3C_ATA_PIO_TIME	S3C_CFATA_REG(0x2c)

#define S3C_ATA_UDMA_TIME	S3C_CFATA_REG(0x30)

#define S3C_ATA_XFR_NUM		S3C_CFATA_REG(0x34)

#define S3C_ATA_XFR_CNT		S3C_CFATA_REG(0x38)

#define S3C_ATA_TBUF_START	S3C_CFATA_REG(0x3c)

#define S3C_ATA_TBUF_SIZE	S3C_CFATA_REG(0x40)

#define S3C_ATA_SBUF_START	S3C_CFATA_REG(0x44)

#define S3C_ATA_SBUF_SIZE	S3C_CFATA_REG(0x48)

#define S3C_ATA_CADR_TBUF	S3C_CFATA_REG(0x4c)

#define S3C_ATA_CADR_SBUF	S3C_CFATA_REG(0x50)

#define S3C_ATA_PIO_DTR		S3C_CFATA_REG(0x54)

#define S3C_ATA_PIO_FED		S3C_CFATA_REG(0x58)

#define S3C_ATA_PIO_SCR		S3C_CFATA_REG(0x5c)

#define S3C_ATA_PIO_LLR		S3C_CFATA_REG(0x60)

#define S3C_ATA_PIO_LMR		S3C_CFATA_REG(0x64)

#define S3C_ATA_PIO_LHR		S3C_CFATA_REG(0x68)

#define S3C_ATA_PIO_DVR		S3C_CFATA_REG(0x6c)

#define S3C_ATA_PIO_CSD		S3C_CFATA_REG(0x70)

#define S3C_ATA_PIO_DAD		S3C_CFATA_REG(0x74)

#define S3C_ATA_PIO_READY	S3C_CFATA_REG(0x78)

#define S3C_ATA_PIO_RDATA	S3C_CFATA_REG(0x7c)



#define S3C_CFATA_MUX_TRUEIDE	0x01



#define S3C_ATA_CFG_SWAP	0x40

#define S3C_ATA_CFG_IORDYEN	0x02



#endif /* __ASM_PLAT_REGS_ATA_H */

drivers/ata/ahci.c

+52 −10
Original line number Diff line number Diff line
@@ -83,6 +83,8 @@ enum board_ids { 
static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);

static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class,

				 unsigned long deadline);

static void ahci_mcp89_apple_enable(struct pci_dev *pdev);

static bool is_mcp89_apple(struct pci_dev *pdev);

static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class,

				unsigned long deadline);

#ifdef CONFIG_PM
@@ -664,6 +666,10 @@ static int ahci_pci_device_resume(struct pci_dev *pdev) 
	if (rc)

		return rc;



	/* Apple BIOS helpfully mangles the registers on resume */

	if (is_mcp89_apple(pdev))

		ahci_mcp89_apple_enable(pdev);



	if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) {

		rc = ahci_pci_reset_controller(host);

		if (rc)
@@ -780,6 +786,48 @@ static void ahci_p5wdh_workaround(struct ata_host *host) 
	}

}



/*

 * Macbook7,1 firmware forcibly disables MCP89 AHCI and changes PCI ID when

 * booting in BIOS compatibility mode.  We restore the registers but not ID.

 */

static void ahci_mcp89_apple_enable(struct pci_dev *pdev)

{

	u32 val;



	printk(KERN_INFO "ahci: enabling MCP89 AHCI mode\n");



	pci_read_config_dword(pdev, 0xf8, &val);

	val |= 1 << 0x1b;

	/* the following changes the device ID, but appears not to affect function */

	/* val = (val & ~0xf0000000) | 0x80000000; */

	pci_write_config_dword(pdev, 0xf8, val);



	pci_read_config_dword(pdev, 0x54c, &val);

	val |= 1 << 0xc;

	pci_write_config_dword(pdev, 0x54c, val);



	pci_read_config_dword(pdev, 0x4a4, &val);

	val &= 0xff;

	val |= 0x01060100;

	pci_write_config_dword(pdev, 0x4a4, val);



	pci_read_config_dword(pdev, 0x54c, &val);

	val &= ~(1 << 0xc);

	pci_write_config_dword(pdev, 0x54c, val);



	pci_read_config_dword(pdev, 0xf8, &val);

	val &= ~(1 << 0x1b);

	pci_write_config_dword(pdev, 0xf8, val);

}



static bool is_mcp89_apple(struct pci_dev *pdev)

{

	return pdev->vendor == PCI_VENDOR_ID_NVIDIA &&

		pdev->device == PCI_DEVICE_ID_NVIDIA_NFORCE_MCP89_SATA &&

		pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE &&

		pdev->subsystem_device == 0xcb89;

}



/* only some SB600 ahci controllers can do 64bit DMA */

static bool ahci_sb600_enable_64bit(struct pci_dev *pdev)

{
@@ -1100,7 +1148,7 @@ static inline void ahci_gtf_filter_workaround(struct ata_host *host) 
{}

#endif



int ahci_init_interrupts(struct pci_dev *pdev, struct ahci_host_priv *hpriv)

static int ahci_init_interrupts(struct pci_dev *pdev, struct ahci_host_priv *hpriv)

{

	int rc;

	unsigned int maxvec;
@@ -1212,15 +1260,9 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 
	if (pdev->vendor == PCI_VENDOR_ID_MARVELL && !marvell_enable)

		return -ENODEV;



	/*

	 * For some reason, MCP89 on MacBook 7,1 doesn't work with

	 * ahci, use ata_generic instead.

	 */

	if (pdev->vendor == PCI_VENDOR_ID_NVIDIA &&

	    pdev->device == PCI_DEVICE_ID_NVIDIA_NFORCE_MCP89_SATA &&

	    pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE &&

	    pdev->subsystem_device == 0xcb89)

		return -ENODEV;

	/* Apple BIOS on MCP89 prevents us using AHCI */

	if (is_mcp89_apple(pdev))

		ahci_mcp89_apple_enable(pdev);



	/* Promise's PDC42819 is a SAS/SATA controller that has an AHCI mode.

	 * At the moment, we can only use the AHCI mode. Let the users know

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