Commit fbaff059 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'imx-fixes-4.9' of... 

Merge tag 'imx-fixes-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes

The i.MX fixes for 4.9:
 - A couple of patches from Fabio to fix the GPC power domain regression
   which is caused by PM Domain core change 0159ec67
   ("PM / Domains: Verify the PM domain is present when adding a
   provider"), and a related kernel crash seen with multi_v7_defconfig
   build.
 - Correct the PHY ID mask for AR8031 to match phy driver code.
 - Apply new added timer erratum A008585 for LS1043A and LS2080A SoC.
 - Correct vf610 global timer IRQ flag to avoid warning from gic driver
   after commit 992345a5 ("irqchip/gic: WARN if setting the
   interrupt type for a PPI fails").

* tag 'imx-fixes-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux

:
  ARM: imx: mach-imx6q: Fix the PHY ID mask for AR8031
  ARM: dts: vf610: fix IRQ flag of global timer
  ARM: imx: gpc: Fix the imx_gpc_genpd_init() error path
  ARM: imx: gpc: Initialize all power domains
  arm64: dts: Add timer erratum property for LS2080A and LS1043A

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 10e15a63 4edd601c

arch/arm/boot/dts/vf500.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -70,7 +70,7 @@ 
			global_timer: timer@40002200 {

				compatible = "arm,cortex-a9-global-timer";

				reg = <0x40002200 0x20>;

				interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;

				interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;

				interrupt-parent = <&intc>;

				clocks = <&clks VF610_CLK_PLATFORM_BUS>;

			};

arch/arm/mach-imx/gpc.c

+12 −3
Original line number Diff line number Diff line
@@ -408,7 +408,7 @@ static struct genpd_onecell_data imx_gpc_onecell_data = { 
static int imx_gpc_genpd_init(struct device *dev, struct regulator *pu_reg)

{

	struct clk *clk;

	int i;

	int i, ret;



	imx6q_pu_domain.reg = pu_reg;
@@ -430,13 +430,22 @@ static int imx_gpc_genpd_init(struct device *dev, struct regulator *pu_reg) 
	if (!IS_ENABLED(CONFIG_PM_GENERIC_DOMAINS))

		return 0;



	pm_genpd_init(&imx6q_pu_domain.base, NULL, false);

	return of_genpd_add_provider_onecell(dev->of_node,

	for (i = 0; i < ARRAY_SIZE(imx_gpc_domains); i++)

		pm_genpd_init(imx_gpc_domains[i], NULL, false);



	ret =  of_genpd_add_provider_onecell(dev->of_node,

					     &imx_gpc_onecell_data);

	if (ret)

		goto power_off;



	return 0;



power_off:

	imx6q_pm_pu_power_off(&imx6q_pu_domain.base);

clk_err:

	while (i--)

		clk_put(imx6q_pu_domain.clk[i]);

	imx6q_pu_domain.reg = NULL;

	return -EINVAL;

}

arch/arm/mach-imx/mach-imx6q.c

+1 −1
Original line number Diff line number Diff line
@@ -173,7 +173,7 @@ static void __init imx6q_enet_phy_init(void) 
				ksz9021rn_phy_fixup);

		phy_register_fixup_for_uid(PHY_ID_KSZ9031, MICREL_PHY_ID_MASK,

				ksz9031rn_phy_fixup);

		phy_register_fixup_for_uid(PHY_ID_AR8031, 0xffffffff,

		phy_register_fixup_for_uid(PHY_ID_AR8031, 0xffffffef,

				ar8031_phy_fixup);

		phy_register_fixup_for_uid(PHY_ID_AR8035, 0xffffffef,

				ar8035_phy_fixup);

arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -123,6 +123,7 @@ 
			     <1 14 0xf08>, /* Physical Non-Secure PPI */

			     <1 11 0xf08>, /* Virtual PPI */

			     <1 10 0xf08>; /* Hypervisor PPI */

		fsl,erratum-a008585;

	};



	pmu {

arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -195,6 +195,7 @@ 
			     <1 14 4>, /* Physical Non-Secure PPI, active-low */

			     <1 11 4>, /* Virtual PPI, active-low */

			     <1 10 4>; /* Hypervisor PPI, active-low */

		fsl,erratum-a008585;

	};



	pmu {

CRA Git | Maintained and supported by SUSTech CRA and CCSE