Commit faea1792 authored by Daniele Ceraolo Spurio's avatar Daniele Ceraolo Spurio Committed by Chris Wilson
Browse files

drm/i915: extract engine WA programming to common resume function 



The workarounds are a common "feature" across gens and submission
mechanisms and we already call the other WA related functions from
common engine ones (<setup/cleanup>_common), so it makes sense to
do the same with WA application. Medium-term, This will help us
reduce the duplication once the GuC resume function is added, but short
term it will also allow us to use the workaround lists for pre-gen8
engine workarounds.

Signed-off-by: default avatarDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20200131075716.2212299-2-chris@chris-wilson.co.uk
parent e85de177

drivers/gpu/drm/i915/gt/intel_engine.h

+2 −0
Original line number Diff line number Diff line
@@ -192,6 +192,8 @@ void intel_engines_free(struct intel_gt *gt); 
int intel_engine_init_common(struct intel_engine_cs *engine);

void intel_engine_cleanup_common(struct intel_engine_cs *engine);



int intel_engine_resume(struct intel_engine_cs *engine);



int intel_ring_submission_setup(struct intel_engine_cs *engine);



int intel_engine_stop_cs(struct intel_engine_cs *engine);

drivers/gpu/drm/i915/gt/intel_engine_cs.c

+14 −0
Original line number Diff line number Diff line
@@ -841,6 +841,20 @@ void intel_engine_cleanup_common(struct intel_engine_cs *engine) 
	intel_wa_list_free(&engine->whitelist);

}



/**

 * intel_engine_resume - re-initializes the HW state of the engine

 * @engine: Engine to resume.

 *

 * Returns zero on success or an error code on failure.

 */

int intel_engine_resume(struct intel_engine_cs *engine)

{

	intel_engine_apply_workarounds(engine);

	intel_engine_apply_whitelist(engine);



	return engine->resume(engine);

}



u64 intel_engine_get_active_head(const struct intel_engine_cs *engine)

{

	struct drm_i915_private *i915 = engine->i915;

drivers/gpu/drm/i915/gt/intel_gt_pm.c

+1 −1
Original line number Diff line number Diff line
@@ -216,7 +216,7 @@ int intel_gt_resume(struct intel_gt *gt) 
		intel_engine_pm_get(engine);



		engine->serial++; /* kernel context lost */

		err = engine->resume(engine);

		err = intel_engine_resume(engine);



		intel_engine_pm_put(engine);

		if (err) {

drivers/gpu/drm/i915/gt/intel_lrc.c

+0 −3
Original line number Diff line number Diff line
@@ -3427,9 +3427,6 @@ static bool unexpected_starting_state(struct intel_engine_cs *engine) 


static int execlists_resume(struct intel_engine_cs *engine)

{

	intel_engine_apply_workarounds(engine);

	intel_engine_apply_whitelist(engine);



	intel_mocs_init_engine(engine);



	intel_engine_reset_breadcrumbs(engine);

drivers/gpu/drm/i915/gt/intel_reset.c

+2 −2
Original line number Diff line number Diff line
@@ -986,7 +986,7 @@ static int resume(struct intel_gt *gt) 
	int ret;



	for_each_engine(engine, gt, id) {

		ret = engine->resume(engine);

		ret = intel_engine_resume(engine);

		if (ret)

			return ret;

	}
@@ -1161,7 +1161,7 @@ int intel_engine_reset(struct intel_engine_cs *engine, const char *msg) 
	 * have been reset to their default values. Follow the init_ring

	 * process to program RING_MODE, HWSP and re-enable submission.

	 */

	ret = engine->resume(engine);

	ret = intel_engine_resume(engine);



out:

	intel_engine_cancel_stop_cs(engine);

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